Publications

• All Publications
• By Project
• ARTS-NVM
• Anchor
• CIMware
• Coordination
• FOSSIL
• HYPNOS
• HetCIM
• MD
• Memento
• NEON
• PAVE
• PIMPMe
• ParPerOS
• SMASH
• SMAUG
• VAMPIR

All Publications

To Appear

Conference Memento HYPNOS NEON
CHaOS: A Persistent Lightweight Cache Hybridization-aware OS

Nils Wilbert, Matthias Szymanski, Stefan Wildermann, Henriette Herzog, Timo Hönig, Jürgen TeichProceedings of the 38th GI/ITG International Conference on Architecture of Computing SystemsSpringer2025.
[BibTex]

🗙

BibTex Entry

@inproceedings{Wilbert:2025,
author = {Wilbert, Nils and Szymanski, Matthias and Wildermann, Stefan and Herzog, Henriette and Hönig, Timo and Teich, Jürgen},
booktitle = {Proceedings of the 38th GI/ITG International Conference on Architecture of Computing Systems},
date = {2025},
entrysubtype = {Conference},
eventdate = {2025-04-22},
publisher = {Springer},
pubstate = {to appear},
series = {ARCS '25},
title = {CHaOS: A Persistent Lightweight Cache Hybridization-aware OS},
venue = {Kiel, Germany},
}

Close

Conference Coordination
Disruptive Memory Technologies: An Overview of DFG Priority Program 2377

Marcel Köppen, Olaf SpinczykProceedings of the 38th GI/ITG International Conference on Architecture of Computing SystemsSpringer2025.
[BibTex]

🗙

BibTex Entry

@inproceedings{Koeppen:2025,
author = {Köppen, Marcel and Spinczyk, Olaf},
booktitle = {Proceedings of the 38th GI/ITG International Conference on Architecture of Computing Systems},
date = {2025},
entrysubtype = {Conference},
publisher = {Springer},
pubstate = {to appear},
series = {{ARCS} '25},
title = {Disruptive Memory Technologies: An Overview of {DFG} Priority Program 2377},
}

Close

Conference HetCIM
LearnCNM2Predict: Transfer Learning-based Performance Model for CNM Systems

Anderson Faustino da Silva, Hamid Farzaned, Joao Paulo Cardoso de Lima, Asif Ali Khan, Jeronimo CastrillonProceedings of the 25st IEEE International Conference on Embedded Computer Systems: Architectures Modeling and Simulation (SAMOS)Springer-Verlag2025to appear.
[BibTex]

🗙

BibTex Entry

@inproceedings{Silva:2025,
author = {da Silva, Anderson Faustino and Farzaned, Hamid and de Lima, Joao Paulo Cardoso and Khan, Asif Ali and Castrillon, Jeronimo},
booktitle = {Proceedings of the 25st {IEEE} International Conference on Embedded Computer Systems: Architectures Modeling and Simulation ({SAMOS})},
date = {2025-07},
entrysubtype = {Conference},
location = {Berlin, Heidelberg},
note = {to appear},
numpages = {17},
organization = {IEEE},
publisher = {Springer-Verlag},
pubstate = {to appear},
title = {{LearnCNM2Predict}: Transfer Learning-based Performance Model for {CNM} Systems},
venue = {Samos, Greece},
}

Close

Conference SMAUG
MxGPU: A Case Study on OS-Controlled GPGPU Multiplexing

Marcel Lütke Dreimann, Olaf SpinczykProceedings of the 38th GI/ITG International Conference on Architecture of Computing SystemsSpringer2025.
[BibTex]

🗙

BibTex Entry

@inproceedings{LuetkeDreimann:2025,
author = {Lütke Dreimann, Marcel and Spinczyk, Olaf},
booktitle = {Proceedings of the 38th GI/ITG International Conference on Architecture of Computing Systems},
date = {2025},
entrysubtype = {Conference},
publisher = {Springer},
pubstate = {to appear},
series = {ARCS '25},
title = {{MxGPU}: A Case Study on {OS}-Controlled {GPGPU} Multiplexing},
}

Close

Conference SMAUG
Overhead Prediction for PIM-Enabled Applications with Performance-Aware Behaviour Models

Birte Friesel, Olaf SpinczykProceedings of the 1st IEEE Cross-disciplinary Conference on Memory-Centric ComputingIEEE2025to appear.
[BibTex]

🗙

BibTex Entry

@inproceedings{Friesel:2025c,
author = {Friesel, Birte and Spinczyk, Olaf},
booktitle = {Proceedings of the 1st IEEE Cross-disciplinary Conference on Memory-Centric Computing},
date = {2025-10},
entrysubtype = {Conference},
note = {to appear},
numpages = {7},
publisher = {IEEE},
pubstate = {to appear},
series = {{CCMCC} '25},
title = {Overhead Prediction for {PIM}-Enabled Applications with Performance-Aware Behaviour Models},
venue = {Dresden, Germany},
}

Close

Conference NEON PAVE
Practical Whole-System Persistence

Dustin Tien Nguyen, Oliver Giersch, Thomas Preisner, Jonathan Krebs, Henriette Herzog, Timo Hönig, Rüdiger Kapitza, Jörg Nolte, Wolfgang Schröder-PreikschatSYSTOR '25: Proceedings of the 18th ACM International Systems and Storage ConferenceAssociation for Computing Machinery2025to appear.
Raw Data [BibTex]

🗙

BibTex Entry

@inproceedings{Nguyen:2025a,
author = {Nguyen, Dustin Tien and Giersch, Oliver and Preisner, Thomas and Krebs, Jonathan and Herzog, Henriette and Hönig, Timo and Kapitza, Rüdiger and Nolte, Jörg and Schröder-Preikschat, Wolfgang},
booktitle = {{SYSTOR} '25: Proceedings of the 18th {ACM} International Systems and Storage Conference},
date = {2025},
entrysubtype = {Conference},
note = {to appear},
publisher = {Association for Computing Machinery},
pubstate = {to appear},
title = {Practical Whole-System Persistence},
}

Close

Workshop VAMPIR MD
To stride or not to stride the memory access?

Lennart Schmidt, Roland Kühn, Matti Krause, Jens Teubner, Wolfgang Lehner, Dirk HabichProceedings of the 3rd Workshop on Disruptive Memory Systems2025accepted.
[BibTex]

🗙

BibTex Entry

@inproceedings{Schmidt:2025,
author = {Schmidt, Lennart and Kühn, Roland and Krause, Matti and Teubner, Jens and Lehner, Wolfgang and Habich, Dirk},
booktitle = {Proceedings of the 3rd Workshop on Disruptive Memory Systems},
date = {2025-10-13},
entrysubtype = {Workshop},
note = {accepted},
pubstate = {accepted},
series = {DIMES '25},
title = {To stride or not to stride the memory access?},
venue = {Seoul, Republic of Korea},
}

Close

2025

Conference HetCIM
All-in-memory Stochastic Computing using ReRAM

João Paulo Cardoso de Lima, Mehran Shoushtari Moghadam, Sercan Aygun, Jeronimo Castrillon, M. Hassan Najafi, Asif Ali KhanProceedings of the 62nd ACM/IEEE Design Automation Conference (DAC'25)Association for Computing Machinery2025.
PDF [BibTex]

🗙

BibTex Entry

@inproceedings{DeLima:2025,
location = {New York, NY, USA},
author = {de Lima, João Paulo Cardoso and Moghadam, Mehran Shoushtari and Aygun, Sercan and Castrillon, Jeronimo and Najafi, M. Hassan and Khan, Asif Ali},
booktitle = {Proceedings of the 62nd {ACM}/{IEEE} Design Automation Conference ({DAC}'25)},
date = {2025-06},
entrysubtype = {Conference},
location = {San Francisco, California},
numpages = {6},
publisher = {Association for Computing Machinery},
series = {{DAC} '25},
title = {All-in-memory Stochastic Computing using {ReRAM}},
}

Close

Conference HetCIM A*
CINM (Cinnamon): A Compilation Infrastructure for Heterogeneous Compute In-Memory and Compute Near-Memory Paradigms

Asif Ali Khan, Hamid Farzaneh, Karl F. A. Friebel, Lorenzo Chelini, Jeronimo CastrillonProceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 4Association for Computing Machinery2025.
10.1145/3622781.3674189 [BibTex]

🗙

BibTex Entry

@inproceedings{Khan:2025,
author = {Asif Ali Khan and Hamid Farzaneh and Karl F. A. Friebel and Lorenzo Chelini and Jeronimo Castrillon},
booktitle = {Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 4},
date = {2025-04-10},
doi = {10.1145/3622781.3674189},
entrysubtype = {Conference},
isbn = {9798400703911},
location = {New York, NY, USA},
pages = {31–46},
publisher = {Association for Computing Machinery},
series = {{ASPLOS} '24},
title = {CINM (Cinnamon): A Compilation Infrastructure for Heterogeneous Compute In-Memory and Compute Near-Memory Paradigms},
venue = {Hilton La Jolla Torrey Pines, La Jolla, CA, USA},
year = {2025},
}

Close

ARTS-NVM A
Co-Designing NVM-based Systems for Machine Learning and In-memory Search Applications

Jörg Henkel, Lokesh Siddhu, Hassan Nassar, Lars Bauer, Jian-Jia Chen, Christian Hakert, Tristan Seidl, Kuan Hsun Chen, Xiaobo Sharon Hu, Mengyuan Li, Chia-Lin Yang, Ming-Liang WeiProceedings of the 43rd IEEE/ACM International Conference on Computer-Aided DesignAssociation for Computing Machinery2025Invited Paper.
10.1145/3676536.3697114 [BibTex]

🗙

BibTex Entry

@inproceedings{Henkel:2025,
author = {Henkel, Jörg and Siddhu, Lokesh and Nassar, Hassan and Bauer, Lars and Chen, Jian-Jia and Hakert, Christian and Seidl, Tristan and Chen, Kuan Hsun and Hu, Xiaobo Sharon and Li, Mengyuan and Yang, Chia-Lin and Wei, Ming-Liang},
booktitle = {Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design},
date = {2025-04-09},
doi = {10.1145/3676536.3697114},
eid = {125},
eventdate = {2024-10-27},
isbn = {9798400710773},
location = {New York, NY, USA},
note = {Invited Paper},
publisher = {Association for Computing Machinery},
series = {ICCAD '24},
title = {Co-Designing NVM-based Systems for Machine Learning and In-memory Search Applications},
venue = {Newark Liberty International Airport Marriott, New York, NY, USA},
}

Close

ARTS-NVM
Evaluating the Impact of Racetrack Memory Misalignment Faults on BNNs Performance

Leonard David Bereholschi, Mikail Yayla, Jian-Jia Chen, Kuan-Hsun Chen, Asif Ali KhanEmbedded Computer Systems: Architectures, Modeling, and SimulationSpringer Nature Switzerland2025.
10.1007/978-3-031-78377-7_16 [BibTex]

🗙

BibTex Entry

@inproceedings{Bereholschi:2025,
abstract = {Racetrack memory ({RTM}) is a promising non-volatile memory ({NVM}) technology that offers exceptional density, power and performance benefits over other {NVM} and conventional memory technologies. {RTM} cells have the unique capability of storing hundreds of data bits per cell and are equipped with one or more access ports. However, accessing data in an {RTM} cell requires the data to be shifted and aligned to an access port, introducing performance and energy overheads and potentially leading to misalignment faults. A misalignment fault occurs when after the shift operation, the desired data is not properly aligned to an access port and incorrect data is read from the {RTM} cell. Countermeasures have been proposed to mitigate the effects of these faults on applications’ accuracy, albeit at the cost of increased overhead. There is potential to balance the trade-offs between acceptable drops in accuracy and enhancements in performance, especially in error-resilient applications such as Binarized Neural Networks ({BNNs}). However, there exists no tool that enables effective exploration of this design space and assess the potential trade-offs.},
author = {Bereholschi, Leonard David and Yayla, Mikail and Chen, Jian-Jia and Chen, Kuan-Hsun and Ali Khan, Asif},
booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation},
date = {2025},
doi = {10.1007/978-3-031-78377-7_16},
editor = {Carro, Luigi and Regazzoni, Francesco and Pilato, Christian},
isbn = {9783031783777},
keywords = {Binarized neural networks ({BNNs}), Racetrack memory, Reliability, Accuracy, Misalignment Faults},
langid = {english},
location = {Cham},
pages = {230–245},
publisher = {Springer Nature Switzerland},
series = {SAMOS 2024},
title = {Evaluating the Impact of Racetrack Memory Misalignment Faults on {BNNs} Performance},
}

Close

Conference ARTS-NVM B
Hardware/Software Co-Analysis for Worst Case Execution Time Bounds

Can Joshua Lehmann, Lars Bauer, Hassan Nassar, Heba Khdr, Jörg HenkelDesign, Automation & Test in Europe Conference (DATE)IEEE2025.
10.23919/date64628.2025.10992765 [BibTex]

🗙

BibTex Entry

@inproceedings{Lehmann:2025,
author = {Lehmann, Can Joshua and Bauer, Lars and Nassar, Hassan and Khdr, Heba and Henkel, Jörg},
booktitle = {Design, Automation \& Test in Europe Conference (DATE)},
date = {2025},
doi = {10.23919/date64628.2025.10992765},
entrysubtype = {Conference},
pages = {1-2},
publisher = {IEEE},
title = {Hardware/Software Co-Analysis for Worst Case Execution Time Bounds},
}

Close

Workshop PAVE Best Paper Award
Honey, I Shrunk the Guests: Page Access Tracking using a Minimal Virtualisation Layer

Dustin Tien Nguyen, Sebastian Rußer, Maximilian Ott, Rüdiger Kapitza, Wolfgang Schröder-Preikschat, Jörg NolteProceedings of the 4th Workshop on Heterogeneous Composable and Disaggregated SystemsAssociation for Computing Machinery2025Best Paper Award.
10.1145/3723851.3723852 [BibTex]

🗙

BibTex Entry

@inproceedings{Nguyen:2025,
abstract = {Advances in memory-intensive areas such as machine learning and graph processing drive demand for suited memory technologies. Part of the answer lies in multi-memory architectures with fast and high-capacity memory tiers. Heterogeneous systems can be very diverse, ranging from {NUMA} to persistent memory and {CXL}-attached memory. Efficient usage requires support from the operating system ({OS}) with knowledge of memory performance characteristics and detailed insight into the page access behaviour of processes. Gathering statistics on the read/write-ratio of accesses and (huge) page utilisation is expensive with common methods.In this paper, we propose vmmload, a minimal virtualisation layer to monitor user space programs using a virtualisation-based page modification log ({PML}) for efficiently gathering runtime statistics. While {PML} is a hardware extension that was originally designed to track virtual machine memory access, vmmload enables observation of individual processes. vmmload monitored user space processes run with {PML}-enabled virtualisation, but are still able to interface with the host {OS}. We explore the viability of using {PML} without a conventional virtual machine and providing the host {OS} with the ability to use these extensions directly.},
author = {Nguyen, Dustin Tien and Rußer, Sebastian and Ott, Maximilian and Kapitza, Rüdiger and Schröder-Preikschat, Wolfgang and Nolte, Jörg},
booktitle = {Proceedings of the 4th Workshop on Heterogeneous Composable and Disaggregated Systems},
date = {2025-04-19},
doi = {10.1145/3723851.3723852},
entrysubtype = {Workshop},
isbn = {9798400714702},
location = {New York, {NY}, {USA}},
pages = {1–7},
publisher = {Association for Computing Machinery},
series = {{HCDS} '25},
shorttitle = {Honey, I Shrunk the Guests},
title = {Honey, I Shrunk the Guests: Page Access Tracking using a Minimal Virtualisation Layer},
url = {https://dl.acm.org/doi/10.1145/3723851.3723852},
venue = {Rotterdam, Netherlands},
}

Close

ParPerOS A
HyperAlloc: Efficient VM Memory De/Inflation via Hypervisor-Shared Page-Frame Allocators

Lars Wrenger, Kenny Albes, Marco Wurps, Christian Dietrich, Daniel LohmannProceedings of the Twentieth European Conference on Computer SystemsAssociation for Computing Machinery2025.
10.1145/3689031.3717484 [BibTex]

🗙

BibTex Entry

@inproceedings{Wrenger:2025,
abstract = {The provisioning of the right amount of {DRAM} to virtual machines ({VMs}) is still a major challenge and cost driver in virtualization settings. Many {VMs} run applications with highly volatile memory demands, which either leads to massive overprovisioning in low-demand phases or poor {QoS} in high-demand phases. Memory hotplugging and ballooning have become established techniques (in Linux/{KVM} available via virtio-mem and virtio-balloon) to dynamically de/inflate the physical memory of a {VM} cooperatively, by having the guests give back unused memory to the hypervisor. However, current {VM} deflation techniques are either not {DMA}-safe, preventing the passthrough of important devices like {GPUs} or {NICs}, or are not flexible or fast enough to cope with the frequently changing demands of the guest.We present {HyperAlloc}, a {DMA}-safe and extremely efficient mechanism for virtual machine de/inflation. The core idea is to provide the hypervisor direct access to the guest's page-frame allocator, greatly reducing the communication overhead. {HyperAlloc} can shrink virtual machines 362 times faster than virtio-balloon and 10 times faster than virtio-mem while having no measurable impact on the guest's performance. {HyperAlloc}'s automatic reclamation provides for better memory elasticity by reducing the average memory footprint of a clang compilation by 17 percent compared to virtio-balloon's free-page reporting while, again, having no measurable impact on the guest's performance.},
author = {Wrenger, Lars and Albes, Kenny and Wurps, Marco and Dietrich, Christian and Lohmann, Daniel},
booktitle = {Proceedings of the Twentieth European Conference on Computer Systems},
date = {2025-03-30},
doi = {10.1145/3689031.3717484},
isbn = {9798400711961},
location = {New York, {NY}, {USA}},
pages = {702–719},
publisher = {Association for Computing Machinery},
series = {{EuroSys} '25},
shorttitle = {{HyperAlloc}},
title = {{HyperAlloc}: Efficient {VM} Memory De/Inflation via Hypervisor-Shared Page-Frame Allocators},
url = {https://dl.acm.org/doi/10.1145/3689031.3717484},
}

Close

Workshop SMAUG
Lightning Talk: Feasibility Analysis of Semi-Permanent Database Offloading to UPMEM Near-Memory Computing Modules

Birte Friesel, Marcel Lütke Dreimann, Olaf SpinczykDatenbanksysteme für Business, Technologie und Web – WorkshopbandGesellschaft für Informatik e.V.2025.
10.18420/BTW2025-140 [BibTex]

🗙

BibTex Entry

@inproceedings{Friesel:2025a,
author = {Friesel, Birte and L{ü}tke Dreimann, Marcel and Spinczyk, Olaf},
booktitle = {Datenbanksysteme für Business, Technologie und Web – Workshopband},
date = {2025-03},
doi = {10.18420/BTW2025-140},
entrysubtype = {Workshop},
location = {Bonn, Germany},
numpages = {11},
pages = {355–366},
publisher = {Gesellschaft für Informatik e.V.},
pubstate = {published},
series = {{BTW} '25},
title = {Lightning Talk: Feasibility Analysis of Semi-Permanent Database Offloading to {UPMEM} Near-Memory Computing Modules},
venue = {Bamberg, Germany},
}

Close

Conference ParPerOS FOSSIL A*
MettEagle: Costs and Benefits of Implementing Containers on Microkernels

Till Miemietz, Viktor Reusch, Matthias Hille, Lars Wrenger, Jana Eisoldt, Jan Klötzke, Max Kurze, Adam Lackorzynski, Michael Roitzsch, Hermann HärtigProceedings of the 19th Symposium on Operating System Design and ImplementationUSENIX Association2025.
Slides [BibTex]

🗙

BibTex Entry

@inproceedings{Miemietz:2025,
author = {Miemietz, Till and Reusch, Viktor and Hille, Matthias and Wrenger, Lars and Eisoldt, Jana and Klötzke, Jan and Kurze, Max and Lackorzynski, Adam and Roitzsch, Michael and H{ä}rtig, Hermann},
booktitle = {Proceedings of the 19th Symposium on Operating System Design and Implementation},
date = {2025-07},
editor = {Lidong Zhou and Yuanyuan Zhou},
entrysubtype = {Conference},
location = {Boston, MA},
pages = {979–996},
publisher = {{USENIX} Association},
series = {{OSDI} '25},
title = {MettEagle: Costs and Benefits of Implementing Containers on Microkernels},
url = {https://www.usenix.org/system/files/osdi25-miemietz.pdf},
}

Close

Journal SMASH
NVM in Data Storage: A Post-Optane Future

Sajad Karim, Johannes Wünsche, David Broneske, Michael Kuhn, Gunter SaakeACM Transactions on Storage21.32025.
10.1145/3731454 [BibTex]

🗙

BibTex Entry

@article{Karim:2025,
author = {Karim, Sajad and Wünsche, Johannes and Broneske, David and Kuhn, Michael and Saake, Gunter},
date = {2025-07},
doi = {10.1145/3731454},
eid = {23},
entrysubtype = {Journal},
issn = {1553-3077},
journaltitle = {ACM Transactions on Storage},
number = {3},
title = {NVM in Data Storage: A Post-Optane Future},
volume = {21},
}

Close

SMAUG
Performance-Aware Behaviour Models for Feature-Dependent Runtime Attributes in Product Lines

Birte Friesel, Olaf SpinczykProceedings of the 19th International Working Conference on Variability Modelling of Software-Intensive SystemsAssociation for Computing Machinery2025.
10.1145/3715340.3715435 [BibTex]

🗙

BibTex Entry

@inproceedings{Friesel:2025,
location = {New York, NY, USA},
author = {Friesel, Birte and Spinczyk, Olaf},
booktitle = {Proceedings of the 19th International Working Conference on Variability Modelling of Software-Intensive Systems},
category = {ESS, SMAUG},
date = {2025-05-28},
doi = {10.1145/3715340.3715435},
isbn = {979-8-4007-1441-2},
location = {Rennes, France},
numpages = {7},
pages = {131–135},
publisher = {Association for Computing Machinery},
series = {VaMoS '25},
title = {Performance-Aware Behaviour Models for Feature-Dependent Runtime Attributes in Product Lines},
}

Close

Poster SMASH
Poster: Embracing NVM: Optimizing Bε-Tree Structures and Data Compression in Storage Engines

Sajad Karim, Johannes Wünsche, David Broneske, Michael Kuhn, Gunter SaakeDatenbanksysteme für Business, Technologie und Web – WorkshopbandGesellschaft für Informatik2025.
10.18420/BTW2025-137 [BibTex]

🗙

BibTex Entry

@inproceedings{Karim:2025a,
author = {Karim, Sajad and Wünsche, Johannes and Broneske, David and Kuhn, Michael and Saake, Gunter},
booktitle = {Datenbanksysteme für Business, Technologie und Web – Workshopband},
date = {2025},
doi = {10.18420/BTW2025-137},
entrysubtype = {Poster},
location = {Bonn},
pages = {329–333},
publisher = {Gesellschaft für Informatik},
series = {BTW 2025},
title = {Poster: Embracing NVM: Optimizing Bε-Tree Structures and Data Compression in Storage Engines},
}

Close

Conference ARTS-NVM B
REAP-NVM: Resilient Endurance-Aware NVM-Based PUF Against Learning-Based Attacks

Hassan Nassar, Ming-Liang Wei, Chia-Lin Yang, Jörg Henkel, Kuan-Hsun ChenDesign, Automation & Test in Europe Conference (DATE)IEEE2025.
10.23919/date64628.2025.10992747 [BibTex]

🗙

BibTex Entry

@inproceedings{Nassar:2025a,
author = {Nassar, Hassan and Wei, Ming-Liang and Yang, Chia-Lin and Henkel, Jörg and Chen, Kuan-Hsun},
booktitle = {Design, Automation \& Test in Europe Conference (DATE)},
date = {2025},
doi = {10.23919/date64628.2025.10992747},
entrysubtype = {Conference},
pages = {1-2},
publisher = {IEEE},
title = {REAP-NVM: Resilient Endurance-Aware NVM-Based PUF Against Learning-Based Attacks},
}

Close

Conference VAMPIR A
Rethinking MIMD-SIMD Interplay for Analytical Query Processing in In-Memory Database Engines

Lennart Schmidt, Johannes Pietrzyk, Juliana Hildebrandt, Alexander Krause, Dirk Habich, Wolfgang LehnerProceedings of the 15th Annual Conference on Innovative Data Systems Research (CIDR ’25)2025.
[BibTex]

🗙

BibTex Entry

@inproceedings{Schmidt:2025a,
author = {Schmidt, Lennart and Pietrzyk, Johannes and Hildebrandt, Juliana and Krause, Alexander and Habich, Dirk and Lehner, Wolfgang},
booktitle = {Proceedings of the 15th Annual Conference on Innovative Data Systems Research (CIDR ’25)},
date = {2025-01-19},
entrysubtype = {Conference},
series = {CIDR '25},
title = {Rethinking {MIMD-SIMD} Interplay for Analytical Query Processing in In-Memory Database Engines},
url = {https://www.vldb.org/cidrdb/papers/2025/p7-schmidt.pdf},
venue = {Amsterdam, The Netherlands},
}

Close

Workshop Memento NEON A
Spork: A posix_spawn you can use as a fork

Manuel Vögele, Christopher Thomas, Timo HönigProceedings of the 20th ACM/SIGOPS Workshop on Hot Topics in Operating Systems (HotOS'25)Assocition for Computing Machinery2025.
10.1145/3713082.3730396 [BibTex]

🗙

BibTex Entry

@inproceedings{Voegele:2025,
author = {Vögele, Manuel and Thomas, Christopher and Hönig, Timo},
booktitle = {Proceedings of the 20th ACM/SIGOPS Workshop on Hot Topics in Operating Systems (HotOS'25)},
date = {2025},
doi = {10.1145/3713082.3730396},
entrysubtype = {Workshop},
isbn = {9798400714757},
location = {New York, NY, USA},
pages = {96–102},
publisher = {Assocition for Computing Machinery},
series = {HotOS '25},
title = {Spork: A posix\_spawn you can use as a fork},
venue = {Banff, AB, Canada},
}

Close

NEON PAVE
Suspend-to-NVRAM: Providing a Responsive Zero-Power Mode as an Integrated Operating-System Feature

Dustin Tien Nguyen, Oliver Giersch, Henriette Herzog, Thomas Preisner, Timo Hönig, Rüdiger Kapitza, Jörg Nolte, Wolfgang Schröder-Preikschat2025.
Raw Data 10.25593/open-fau-1574 [BibTex]

🗙

BibTex Entry

@report{Nguyen:2025b,
author = {Nguyen, Dustin Tien and Giersch, Oliver and Herzog, Henriette and Preisner, Thomas and Hönig, Timo and Kapitza, Rüdiger and Nolte, Jörg and Schröder-Preikschat, Wolfgang},
date = {2025},
doi = {10.25593/open-fau-1574},
institution = {Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Department Informatik},
number = {CS-2025-01},
title = {Suspend-to-{NVRAM}: Providing a Responsive Zero-Power Mode as an Integrated Operating-System Feature},
}

Close

Conference Memento NEON A
Systematic Analysis of Kernel Security Performance and Energy Costs

Fabian Rauscher, Benedict Herzog, Timo Hönig, Daniel GrussProceedings of the 20th Asia Conference on Computer and Communications Security (AsiaCCS'25)Association for Computing Machinery2025.
10.1145/3708821.3736197 [BibTex]

🗙

BibTex Entry

@inproceedings{Rauscher:2025,
author = {Rauscher, Fabian and Herzog, Benedict and Hönig, Timo and Gruss, Daniel},
booktitle = {Proceedings of the 20th Asia Conference on Computer and Communications Security (AsiaCCS'25)},
date = {2025-08-24},
doi = {10.1145/3708821.3736197},
entrysubtype = {Conference},
isbn = {9798400714108},
location = {New York, NY, USA},
pages = {1676–1689},
publisher = {Association for Computing Machinery},
series = {ASIA CCS '25},
title = {Systematic Analysis of Kernel Security Performance and Energy Costs},
}

Close

PIMPMe
Temporal graph processing in modern memory hierarchies

Alexander Baumstark, Muhammad Attahir Jibril, Kai-Uwe SattlerInformation Systems1272025.
10.1016/j.is.2024.102462 [BibTex]

🗙

BibTex Entry

@article{Baumstark:2025,
abstract = {Updates in graph {DBMS} lead to structural changes in the graph over time with different intermediate states. Capturing these changes and their time is one of the main purposes of temporal {DBMS}. Most {DBMSs} built their temporal features based on their non-temporal processing and storage without considering the memory hierarchy of the underlying system. This leads to slower temporal processing and poor storage utilization. In this paper, we propose a storage and processing strategy for (bi-) temporal graphs using temporal materialized views ({TMV}) while exploiting the memory hierarchy of a modern system. Further, we show a solution to the query containment problem for certain types of temporal graph queries. Finally, we evaluate the overhead and performance of the presented approach. The results show that using {TMV} reduces the runtime of temporal graph queries while using less memory.},
author = {Baumstark, Alexander and Jibril, Muhammad Attahir and Sattler, Kai-Uwe},
date = {2025-01-01},
doi = {10.1016/j.is.2024.102462},
eid = {102462},
issn = {0306-4379},
journaltitle = {Information Systems},
keywords = {Temporal graph, Materialized view, Memory hierarchy},
shortjournal = {Information Systems},
title = {Temporal graph processing in modern memory hierarchies},
url = {https://www.sciencedirect.com/science/article/pii/S0306437924001200},
volume = {127},
}

Close

NEON PAVE
Towards Static Analysis of Interrupt Blocking Time in Operating System Kernels

Thomas Preisner, Dustin T. Nguyen, Jonathan Krebs, Rüdiger Kapitza, Wolfgang Schröder-Preikschat2025Presented at 2nd Workshop on Hot Topics in System Infrastructure (HotInfra 2024).
10.25593/open-fau-1544 [BibTex]

🗙

BibTex Entry

@report{Preisner:2025a,
author = {Preisner, Thomas and Nguyen, Dustin T. and Krebs, Jonathan and Kapitza, Rüdiger and Schröder-Preikschat, Wolfgang},
date = {2025},
doi = {10.25593/open-fau-1544},
institution = {Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Department Informatik},
note = {Presented at 2nd Workshop on Hot Topics in System Infrastructure (HotInfra 2024)},
number = {CS-2025-01},
title = {Towards Static Analysis of Interrupt Blocking Time in Operating System Kernels},
}

Close

ARTS-NVM
Turbo-FHE: Accelerating Fully Homomorphic Encryption with FPGA and HBM Integration

Hassan Nassar, Lars Bauer, Jörg HenkelIEEE Design & Test42.32025.
10.1109/MDAT.2025.3527368 [BibTex]

🗙

BibTex Entry

@article{Nassar:2025,
abstract = {The landscape of {IT} infrastructure shifted with the adoption of cloud computing, allowing organizations to use on-demand services, relieving them from owning {IT} infrastructure. However, this transformation comes with escalating concerns over privacy and security as the data processing is done on plaintext. If the cloud provider is malicious or vulnerable, the data of the users can be breached [1].},
author = {Nassar, Hassan and Bauer, Lars and Henkel, Jörg},
date = {2025-01-10},
doi = {10.1109/MDAT.2025.3527368},
eventtitle = {{IEEE} Design \& Test},
issn = {2168-2364},
journaltitle = {{IEEE} Design \& Test},
keywords = {Field programmable gate arrays, Polynomials, Noise, Homomorphic encryption, Arrays, Memory management, Accuracy, Three-dimensional displays, Bandwidth, Software},
number = {3},
pages = {86–93},
shorttitle = {Turbo-{FHE}},
title = {Turbo-{FHE}: Accelerating Fully Homomorphic Encryption with {FPGA} and {HBM} Integration},
url = {https://ieeexplore.ieee.org/document/10836861/},
volume = {42},
}

Close

SMAUG B
Understanding Product Line Runtime Performance with Behaviour Models and Regression Model Trees

Birte Friesel, Olaf SpinczykProceedings of the 29th ACM International Systems and Software Product Line Conference - Volume AACM Press2025to appear.
10.1145/3744915.3748472 [BibTex]

🗙

BibTex Entry

@inproceedings{Friesel:2025b,
location = {New York, NY, USA},
author = {Friesel, Birte and Spinczyk, Olaf},
booktitle = {Proceedings of the 29th ACM International Systems and Software Product Line Conference - Volume A},
date = {2025-09},
doi = {10.1145/3744915.3748472},
location = {A Coru{ñ}a, Spain},
note = {to appear},
numpages = {7},
publisher = {ACM Press},
series = {{SPLC-A} '25},
title = {Understanding Product Line Runtime Performance with Behaviour Models and Regression Model Trees},
}

Close

VAMPIR
Unleashing the Intel Data Streaming Accelerator

André Berthold, Lennart Schmidt, Wolfgang Lehner, Horst SchirmeierDatenbanksysteme für Business, Technologie und Web - Workshopband (BTW 2025)Gesellschaft für Informatik2025.
10.18420/BTW2025-139 [BibTex]

🗙

BibTex Entry

@inproceedings{Berthold:2025,
author = {Berthold, André and Schmidt, Lennart and Lehner, Wolfgang and Schirmeier, Horst},
booktitle = {Datenbanksysteme für Business, Technologie und Web - Workshopband (BTW 2025)},
date = {2025-03},
doi = {10.18420/BTW2025-139},
location = {Bonn},
pages = {345–353},
publisher = {Gesellschaft für Informatik},
series = {Lecture Notes in Informatics},
title = {Unleashing the {Intel Data Streaming Accelerator}},
venue = {Bamberg, Germany},
}

Close

Memento PAVE NEON
Where are the Joules? Energy Demand Analysis of Heterogeneous Memory Technologies

Thomas Preisner, Dustin Tien Nguyen, Manuel Vögele, Matthias Szymanski, Timo Hönig, Rüdiger Kapitza, Wolfgang Schröder-PreikschatProceedings of the 4th Workshop on Heterogeneous Composable and Disaggregated SystemsAssociation for Computing Machinery2025.
10.1145/3723851.3723857 [BibTex]

🗙

BibTex Entry

@inproceedings{Preisner:2025,
abstract = {New heterogeneous memory architectures are emerging with the increasing availability of different memory technologies. The growing number of byte-addressable memory technologies (e.g., {NVRAM} and {CXL}) make the selection of components for concrete systems increasingly difficult, as each memory technology has specific advantages and disadvantages. Currently, decisions are made based on a variety of performance measurements and recommendations with respective implementation guidelines. However, traditional performance metrics often overlook the unique energy-demand dynamics of each specific memory technology, especially with diverse memory access patterns and workloads.This paper highlights the importance of memory utilization with different technologies and their environmental impact (i.e., energy demand). To this end, we present {meBench} – a benchmark generator that systematically quantifies the (non-uniform) energy demand of different memory types. We reveal the relevance of the generated results by contrasting them with the assumptions made in previous research on carbon-aware memory allocation.},
author = {Preisner, Thomas and Nguyen, Dustin Tien and Vögele, Manuel and Szymanski, Matthias and Hönig, Timo and Kapitza, Rüdiger and Schröder-Preikschat, Wolfgang},
booktitle = {Proceedings of the 4th Workshop on Heterogeneous Composable and Disaggregated Systems},
date = {2025-04-19},
doi = {10.1145/3723851.3723857},
isbn = {9798400714702},
location = {New York, {NY}, {USA}},
pages = {60–66},
publisher = {Association for Computing Machinery},
series = {{HCDS} '25},
shorttitle = {Where are the Joules?},
title = {Where are the Joules? Energy Demand Analysis of Heterogeneous Memory Technologies},
url = {https://dl.acm.org/doi/10.1145/3723851.3723857},
venue = {Rotterdam, Netherlands},
}

Close

2024

Workshop SMASH
A Design Proposal for a Unified B-epsilon-tree: Embracing NVM in Memory Hierarchies

Sajad Karim, Johannes Wünsche, David Broneske, Michael Kuhn, Gunter SaakeProceedings of the 35th GI-Workshop on Foundations of Databases (Grundlagen von Datenbanken)CEUR-WS.org2024.
[BibTex]

🗙

BibTex Entry

@inproceedings{Karim:2024,
accessdate = {2024-09-06},
author = {Sajad Karim and Johannes Wünsche and David Broneske and Michael Kuhn and Gunter Saake},
booktitle = {Proceedings of the 35th GI-Workshop on Foundations of Databases (Grundlagen von Datenbanken)},
date = {2024-05-22},
editor = {Störl, Uta},
entrysubtype = {Workshop},
eventdate = {2024-05-22 / 2024-05-24},
location = {Herdecke, Germany},
pages = {43-50},
publisher = {CEUR-WS.org},
series = {CEUR Workshop Proceedings},
title = {A Design Proposal for a Unified B-epsilon-tree: Embracing NVM in Memory Hierarchies},
url = {https://ceur-ws.org/Vol-3710/paper7.pdf},
volume = {3710},
}

Close

FOSSIL
A Perfect Fit? - Towards Containers on Microkernels

Till Miemietz, Viktor Reusch, Matthias Hille, Max Kurze, Adam Lackorzynksi, Michael Roitzsch, Hermann HärtigProceedings of the 10th International Workshop on Container Technologies and Container CloudsAssociation for Computing Machinery2024.
10.1145/3702637.3702957 [BibTex]

🗙

BibTex Entry

@inproceedings{Miemietz:2024,
abstract = {Containers are a light weight alternative to virtual machines, building on sandboxed processes whose permissions are restricted by additional security mechanisms such as seccomp-bpf. However, these mechanisms increase the kernel's attack surface, thus prompting new security challenges. In this paper, we ask the question of whether a system with processes properly restricted by design enables a container infrastructure with better security posture. For instance, microkernels with capability-based access control provide container-style isolation out of the box. On the basis of real-world {CVEs}, we argue that this conceptual simplicity actually results in a better security posture than that typically found on monolithic systems.We propose Oak, a container engine built on top of L4Re, a state-of-the-art microkernel-based operating system. For startup as well as for network microbenchmarks, containers running on L4Re exposed performance characteristics similar to that of containers on Linux. We thus conclude that building containers on microkernel is an approach worth pursuing further under both a performance and a security perspective.},
author = {Miemietz, Till and Reusch, Viktor and Hille, Matthias and Kurze, Max and Lackorzynksi, Adam and Roitzsch, Michael and Härtig, Hermann},
booktitle = {Proceedings of the 10th International Workshop on Container Technologies and Container Clouds},
date = {2024-12-02},
doi = {10.1145/3702637.3702957},
isbn = {9798400713392},
location = {New York, {NY}, {USA}},
pages = {1–6},
publisher = {Association for Computing Machinery},
series = {{WoC} '24},
shorttitle = {A Perfect Fit?},
title = {A Perfect Fit? - Towards Containers on Microkernels},
url = {https://dl.acm.org/doi/10.1145/3702637.3702957},
venue = {Hong Kong},
}

Close

PIMPMe A*
Accelerating Aggregation Using a Real Processing-in-Memory System

Muhammad Attahir Jibril, Hani Al-Sayeh, Kai-Uwe SattlerProceedings of the 2024 IEEE 40th International Conference on Data Engineering (ICDE)2024.
10.1109/ICDE60146.2024.00300 [BibTex]

🗙

BibTex Entry

@inproceedings{Jibril:2024,
author = {Muhammad Attahir Jibril and Hani Al-Sayeh and Kai-Uwe Sattler},
booktitle = {Proceedings of the 2024 IEEE 40th International Conference on Data Engineering (ICDE)},
date = {2024-01-01},
doi = {10.1109/ICDE60146.2024.00300},
keywords = {Energy consumption;Memory management;Bandwidth;Data engineering;Hardware;Optimization;PIM;aggregation;UPMEM;performance optimization;modern hardware},
location = {Utrecht, Netherlands},
pages = {3920-3932},
pubstate = {published},
title = {Accelerating Aggregation Using a Real Processing-in-Memory System},
year = {2024},
}

Close

PIMPMe A*
Agile-Ant: Self-Managing Distributed Cache Management for Cost Optimization of Big Data Applications

Hani Al-Sayeh, Muhammad Attahir Jibril, Kai-Uwe SattlerProceedings of the VLDB Endowment17.112024.
10.14778/3681954.3681990 [BibTex]

🗙

BibTex Entry

@article{AlSayeh:2024,
abstract = {Distributed in-memory processing frameworks accelerate application runs by caching important datasets in memory. Allocating a suitable cluster configuration for caching these datasets plays a crucial role in achieving minimal cost. We present Agile-ant, a self-managing framework that identifies important datasets and scales out the cluster memory to cache them on the fly without any human interaction, without any prior knowledge of the application, the characteristics of the input data, the specification of the computing resources and their utilization by multiple-tenants. We evaluate Agile-ant on various real-world applications. Compared with our baseline, Agile-ant reduces execution cost by 78.3\% on average and provides better performance than the related work.},
author = {Al-Sayeh, Hani and Jibril, Muhammad Attahir and Sattler, Kai-Uwe},
date = {2024-07-01},
doi = {10.14778/3681954.3681990},
issn = {2150-8097},
journaltitle = {Proceedings of the {VLDB} Endowment},
number = {11},
pages = {3151–3164},
shorttitle = {Agile-Ant},
title = {Agile-Ant: Self-Managing Distributed Cache Management for Cost Optimization of Big Data Applications},
url = {https://doi.org/10.14778/3681954.3681990},
volume = {17},
}

Close

ARTS-NVM
An FPGA-Based RISC-V Instruction Set Extension and Memory Controller for Multi-Level Cell NVM

Mina Ibrahim, Martel Shokry, Lokesh Siddhu, Lars Bauer, Hassan Nassar, Jörg Henkel2024 International Conference on Microelectronics (ICM)2024ISSN: 2159-1679.
10.1109/ICM63406.2024.10815826 [BibTex]

🗙

BibTex Entry

@inproceedings{Ibrahim:2024,
abstract = {Non-volatile memory ({NVM}) technologies, particularly Multi-Level Cell ({MLC}) {NVMs}, offer significant potential for increasing memory density. {MLC} {NVMs} provide a trade-off between write latency and retention time, where faster writes/stores result in lower retention and slower writes yield higher retention. However, limited work has been done to validate and prototype {NVM}-based systems in hardware, leveraging this tradeoff at the system level. In this paper, we present a novel memory controller architecture and a {RISC}-V instruction set extension to optimize {MLC} {NVM} write operations by balancing speed and retention time. Our custom {NVM} controller, built around a finite state machine with an {AXI} memory-mapped interface, efficiently manages read/write operations with enhanced burst transfers, minimizing latency. Additionally, we introduce a fast-store instruction in {RISC}-V to increasing write performance while addressing retention limitations. These enhancements are implemented in hardware on an {FPGA} platform. Experimental results show that our controller reduces hardware overhead by 30\% compared to conventional designs, and the fast-store instruction improves performance by over 7\% for streaming workloads with less than 0.08\% hardware overhead.},
author = {Ibrahim, Mina and Shokry, Martel and Siddhu, Lokesh and Bauer, Lars and Nassar, Hassan and Henkel, Jörg},
booktitle = {2024 International Conference on Microelectronics ({ICM})},
date = {2024-12},
doi = {10.1109/ICM63406.2024.10815826},
eventtitle = {2024 International Conference on Microelectronics ({ICM})},
issn = {2159-1679},
keywords = {Nonvolatile memory, Instruction sets, Microprocessors, Automata, Prototypes, Hardware, Delays, Microelectronics, Optimization, Clocks, {NVM}, {FPGA}, {RISC}-V},
note = {{ISSN}: 2159-1679},
pages = {1–6},
title = {An {FPGA}-Based {RISC}-V Instruction Set Extension and Memory Controller for Multi-Level Cell {NVM}},
url = {https://ieeexplore.ieee.org/document/10815826},
}

Close

ParPerOS
Analyzing the memory ordering models of the Apple M1

Lars Wrenger, Dominik Töllner, Daniel LohmannJournal of Systems Architecture1492024.
10.1016/j.sysarc.2024.103102 [BibTex]

🗙

BibTex Entry

@article{Wrenger:2024,
author = {Lars Wrenger and Dominik Töllner and Daniel Lohmann},
date = {2024-04},
doi = {10.1016/j.sysarc.2024.103102},
issn = {1383-7621},
journaltitle = {Journal of Systems Architecture},
keywords = {Apple M1, ARM, Memory ordering, TSO},
pages = {103102:1-8},
pubstate = {published},
title = {Analyzing the memory ordering models of the Apple M1},
url = {https://www.sciencedirect.com/science/article/pii/S1383762124000390},
volume = {149},
}

Close

HetCIM A*
C4CAM: A Compiler for CAM-based In-memory Accelerators

Hamid Farzaneh, João Paulo Cardoso de Lima, Mengyuan Li, Asif Ali Khan, Xiaobo Sharon Hu, Jeronimo CastrillonProceedings of the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS'24)2024.
10.1145/3620666.3651386 [BibTex]

🗙

BibTex Entry

@inproceedings{Farzaneh:2024a,
author = {Farzaneh, Hamid and de Lima, João Paulo Cardoso and Li, Mengyuan and Khan, Asif Ali and Hu, Xiaobo Sharon and Castrillon, Jeronimo},
booktitle = {Proceedings of the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS'24)},
date = {2024-05},
doi = {10.1145/3620666.3651386},
pages = {164–177},
pubstate = {published},
title = {C4CAM: A Compiler for CAM-based In-memory Accelerators},
}

Close

Memento NEON
Carbon-Aware Memory Placement

Sven Köhler, Benedict Herzog, Henriette Herzog, Manuel Vögele, Lukas Wenzel, Andreas Polze, Timo HönigSIGENERGY Energy Informatics Review4.32024.
10.1145/3698365.3698372 [BibTex]

🗙

BibTex Entry

@article{Koehler:2024,
abstract = {The carbon footprint of software activities is determined by embodied and operational emissions of hardware resources. This paper presents {cMemento}, a concept that enables operating systems to make carbon-aware memory placement decisions.Main memory has become heterogeneous in today's computer systems. In addition to traditional (and volatile) main memory (e.g. {DRAM}), novel memory technologies with persistent properties are often also available (e.g. {PRAM}, {FRAM}, {MRAM}). Complementary, there are a large number of new memory interfaces (e.g. high-bandwidth, graphics, and low-power memory) that have to be additionally taken into account by the operating system when allocating memory. The availability of new memory technologies and interfaces enables systems with improved energy efficiency. At the same time, the new memory interfaces have revealed serious flaws in the current state-of-the-art memory abstractions in operating systems. Hence, moving away from the homogeneous perspective of memory resources is a crucial step towards significantly reducing the energy consumption and, ultimately, the carbon footprint of today's computer systems.With {cMemento}, we propose an approach that combines information on characteristics of (i) active workloads and (ii) available memory resources with a carbon model. {cMemento} transforms the combined information into memory placement decisions at operating system level. The placement decisions that are made result in improved operating conditions (i.e. better energy efficiency and lower carbon footprint) for the available memory resources.},
author = {Köhler, Sven and Herzog, Benedict and Herzog, Henriette and Vögele, Manuel and Wenzel, Lukas and Polze, Andreas and Hönig, Timo},
date = {2024-09-30},
doi = {10.1145/3698365.3698372},
journaltitle = {{SIGENERGY} Energy Informatics Review},
number = {3},
pages = {39–45},
title = {Carbon-Aware Memory Placement},
url = {https://dl.acm.org/doi/10.1145/3698365.3698372},
volume = {4},
}

Close

ParPerOS A*
Cloud-Native Database Systems and Unikernels: Reimagining OS Abstractions for Modern Hardware

Viktor Leis, Christian DietrichProceedings of the VLDB EndowmentVLDB Endowment2024.
10.14778/3659437.3659462 [BibTex]

🗙

BibTex Entry

@inproceedings{Leis:2024,
author = {Viktor Leis and Christian Dietrich},
booktitle = {Proceedings of the VLDB Endowment},
date = {2024-04},
doi = {10.14778/3659437.3659462},
location = {Guangzhou, China},
number = {8},
pages = {2115–2122},
publisher = {VLDB Endowment},
pubstate = {published},
title = {Cloud-Native Database Systems and Unikernels: Reimagining OS Abstractions for Modern Hardware},
volume = {17},
year = {2024},
}

Close

VAMPIR
Demystifying Intel Data Streaming Accelerator for In-Memory Data Processing

A. Berthold, C. Fürst, A. Obersteiner, L. Schmidt, D. Habich, W. Lehner, H. SchirmeierProceedings of the 2nd Workshop on Disruptive Memory SystemsAssociation for Computing Machinery2024.
10.1145/3698783.3699383 [BibTex]

🗙

BibTex Entry

@inproceedings{Berthold:2024a,
author = {Berthold, A. and Fürst, C. and Obersteiner, A. and Schmidt, L. and Habich, D. and Lehner, W. and Schirmeier, H.},
booktitle = {Proceedings of the 2nd Workshop on Disruptive Memory Systems},
date = {2024-11-03},
doi = {10.1145/3698783.3699383},
isbn = {9798400713033},
location = {New York, NY, USA},
pages = {9–16},
publisher = {Association for Computing Machinery},
series = {DIMES '24},
title = {Demystifying Intel Data Streaming Accelerator for In-Memory Data Processing},
venue = {Austin, TX, USA},
}

Close

Memento NEON
Dirty Electrons: On the Carbon Intensity of Stored Energy

Robin Ohs, Henry Janson, Andreas Schmidt, Luis Gerhorst, Benedict Herzog, Timo HönigProceedings of the 2024 IEEE 15th International Green and Sustainable Computing Conference (IGSC)2024.
10.1109/IGSC64514.2024.00018 [BibTex]

🗙

BibTex Entry

@inproceedings{Ohs:2024,
abstract = {To reduce carbon emissions, system software must accurately trace and properly attribute these emissions to applications that cause energy consumption and hardware degradation. While the carbon intensity of the grid energy is readily available from online services, it is often overlooked that computing systems do not directly and immediately consume this energy. Instead, energy coming from the grid is first transformed by power supplies ({PSUs}) and then often stored in batteries.In this work, we investigate how {PSUs} and batteries affect the carbon intensity of the energy that actually powers the computer system. We analyze the extent to which specific hardware characteristics need to be taken into account in order to accurately attribute operational and embodied emissions to applications. To do this, we propose an analytical model for the carbon intensity of stored energy, which includes power supply and charging efficiency (which inflates operational emissions) and battery degradation (which causes embodied emissions). We conclude with a look at the future of system-level management of emissions caused by stored energy.},
author = {Ohs, Robin and Janson, Henry and Schmidt, Andreas and Gerhorst, Luis and Herzog, Benedict and Hönig, Timo},
booktitle = {Proceedings of the 2024 {IEEE} 15th International Green and Sustainable Computing Conference ({IGSC})},
date = {2024-11},
doi = {10.1109/IGSC64514.2024.00018},
issn = {2993-2084},
keywords = {Degradation, Energy consumption, Analytical models, Power supplies, Carbon dioxide, Hardware, Batteries, System software, Electrons, energy-aware systems, carbon-aware systems, battery models},
pages = {45–51},
shorttitle = {Dirty Electrons},
title = {Dirty Electrons: On the Carbon Intensity of Stored Energy},
url = {https://ieeexplore.ieee.org/document/10765823},
}

Close

HYPNOS
Exploring Multi-Reader Buffers and Channel Placement During Dataflow Network Mapping to Heterogeneous Many-Core Systems

Martin Letras, Joachim Falk, Jürgen TeichIEEE Access122024.
10.1109/ACCESS.2024.3375079 [BibTex]

🗙

BibTex Entry

@article{Letras:2024,
abstract = {This paper presents an approach for reducing the memory requirements of periodically executed dataflow applications, while minimizing the period when deployed on a many-core target. Often, implementations of dataflow applications suffer from data duplication if identical data has to be processed by multiple actors. In fact, multi-cast (also called fork) actors can produce huge memory overheads when storing and communicating copies of the same data. As a remedy, so-called Multi-Reader Buffers ({MRBs}) can be utilized to forward identical data to multiple actors in a First In First Out ({FIFO}) manner while storing each data item only once by sharing. However, using {MRBs} may increase the achievable period due to contention when accessing the shared data. This paper proposes a novel multi-objective design space exploration approach that selectively replaces multi-cast actors with {MRBs} and explores actor and {FIFO} channel mappings to find trade-offs between the objectives of period, memory footprint, and core cost. In distinction to the state-of-the-art, our approach considers (i) memory-size constraints for on-chip memories, (ii) hierarchical memories to implement the buffers, e.g., tile-local memories, (iii) supports heterogeneous many-core platforms, i.e., core-type dependent actor execution times, and (iv) optimizes the buffer placement and overall scheduling to minimize the execution period by proposing a novel combined actor and communication scheduling heuristic for period minimization called Communication-Aware Periodic Scheduling on Heterogeneous Many-core Systems ({CAPS}-{HMS}). Our results show that the explored Pareto fronts improve a hypervolume indicator over a reference approach by up to 66 \% for small to mid-size applications and 90 \% for large applications. Moreover, selectively replacing multi-cast actors with corresponding {MRBs} proves to be always superior to never or always replacing them. Finally, it is shown that the quality of the explored Pareto fronts does not degrade when replacing the efficient scheduling heuristic {CAPS}-{HMS} by an Integer Linear Program ({ILP}) solver that requires orders of magnitude higher solver times and thus cannot be applied to large scale dataflow network problems.},
author = {Letras, Martin and Falk, Joachim and Teich, Jürgen},
date = {2024-03-07},
doi = {10.1109/ACCESS.2024.3375079},
issn = {2169-3536},
journaltitle = {{IEEE} Access},
keywords = {Minimization, Firing, Schedules, Processor scheduling, Throughput, Image processing, Space exploration, Many-core systems, dataflow networks, mapping, Pareto optimization, memory management, modulo scheduling},
pages = {39748–39769},
title = {Exploring Multi-Reader Buffers and Channel Placement During Dataflow Network Mapping to Heterogeneous Many-Core Systems},
url = {https://ieeexplore.ieee.org/document/10463021},
volume = {12},
}

Close

Conference Memento NEON B
GreenPipe: Energy-Efficient Data-Processing Pipelines in Resource-Constrained Systems

Benedict Herzog, Jakob Schubert, Tim Rheinfels, Christian Nickel, Timo HönigProceedings of the 21st International Conference on Embedded Wireless Systems and NetworksAssociation for Computing Machinery2024.
[BibTex]

🗙

BibTex Entry

@inproceedings{Herzog:2024,
accessdate = {2025-05-06},
author = {Herzog, Benedict and Schubert, Jakob and Rheinfels, Tim and Nickel, Christian and Hönig, Timo},
booktitle = {Proceedings of the 21st International Conference on Embedded Wireless Systems and Networks},
date = {2024},
entrysubtype = {Conference},
location = {New York, {NY}, {USA}},
publisher = {Association for Computing Machinery},
series = {EWSN '24},
title = {GreenPipe: Energy-Efficient Data-Processing Pipelines in Resource-Constrained Systems},
url = {https://www.ewsn.org/file-repository/ewsn2024/ewsn24-final133.pdf},
}

Close

CIMware
Hardware and Software Co-design for Optimized Decoding Schemes and Application Mapping in NVM Compute-in-Memory Architectures

S. M. Siddaramu, A. Nezhadi, M. Mayahinia, S. M. Ghasemi, M. B. TahooriIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems43.112024.
10.1109/TCAD.2024.3447216 [BibTex]

🗙

BibTex Entry

@article{Siddaramu:2024,
author = {Siddaramu, S. M. and Nezhadi, A. and Mayahinia, M. and Ghasemi, S. M. and Tahoori, M. B.},
date = {2024-11-06},
doi = {10.1109/TCAD.2024.3447216},
issn = {1937-4151},
journaltitle = {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
number = {11},
pages = {3744–3755},
title = {Hardware and Software Co-design for Optimized Decoding Schemes and Application Mapping in NVM Compute-in-Memory Architectures},
volume = {43},
}

Close

SMAUG B
HetSim: A Simulator for Task-based Scheduling on Heterogeneous Hardware

Marcel Lütke Dreimann, Birte Friesel, Olaf SpinczykCompanion of the 15th ACM/SPEC International Conference on Performance EngineeringAssociation for Computing Machinery2024.
10.1145/3629527.3652275 [BibTex]

🗙

BibTex Entry

@inproceedings{LuetkeDreimann:2024,
author = {Lütke Dreimann, Marcel and Friesel, Birte and Spinczyk, Olaf},
booktitle = {Companion of the 15th ACM/SPEC International Conference on Performance Engineering},
date = {2024-01-01},
doi = {10.1145/3629527.3652275},
isbn = {9798400704451},
location = {New York, NY, USA},
pages = {261–268},
publisher = {Association for Computing Machinery},
pubstate = {published},
series = {ICPE '24 Companion},
title = {HetSim: A Simulator for Task-based Scheduling on Heterogeneous Hardware},
year = {2024},
}

Close

MD C
How to Be Fast and Not Furious: Looking Under the Hood of CPU Cache Prefetching

Roland Kühn, Jan Mühlig, Jens TeubnerProceedings of the 20th Int'l Workshop on Data Management on Modern Hardware (DaMoN)How to Be Fast and Not Furious: Looking Under the Hood of CPU Cache PrefetchingAssociation for Computing Machinery2024.
10.1145/3662010.3663451 [BibTex]

🗙

BibTex Entry

@inproceedings{Kuehn:2024,
author = {Roland Kühn and Jan Mühlig and Jens Teubner},
booktitle = {Proceedings of the 20th Int'l Workshop on Data Management on Modern Hardware (DaMoN)},
date = {2024-06-09},
doi = {10.1145/3662010.3663451},
isbn = {9798400706677},
journaltitle = {How to Be Fast and Not Furious: Looking Under the Hood of CPU Cache Prefetching},
location = {Santiago, Chile},
publisher = {Association for Computing Machinery},
pubstate = {published},
series = {DaMoN '24},
title = {How to Be Fast and Not Furious: Looking Under the Hood of CPU Cache Prefetching},
year = {2024},
}

Close

HYPNOS Best Paper Award
Hybrid Cache Design Under Varying Power Supply Stability - A Comparative Study

Nils Wilbert, Stefan Wildermann, Jürgen TeichProceedings of the 10th International Symposium on Memory SystemsAssociation for Computing Machinery2024Best Paper Award.
10.1145/3695794.3695819 [BibTex]

🗙

BibTex Entry

@inproceedings{Wilbert:2024a,
author = {Wilbert, Nils and Wildermann, Stefan and Teich, Jürgen},
booktitle = {Proceedings of the 10th International Symposium on Memory Systems},
date = {2024-12-11},
doi = {10.1145/3695794.3695819},
eventdate = {2024-09-30},
isbn = {979-8-4007-1091-9/24/09},
location = {New York, NY, USA},
publisher = {Association for Computing Machinery},
series = {MEMSYS 24},
title = {{Hybrid} {Cache} {Design} {Under} {Varying} {Power} {Supply} {Stability} - {A} {Comparative} {Study}},
url = {https://www.memsys.io/wp-content/uploads/ninja-forms/5/cameraReadyConference.pdf},
venue = {Washington, D.C.},
year = {2024},
}

Close

Memento
Moses: Heap Partitioning for Semantic Data Tiering

F. Eberhardt, A. Grapentin, S. Köhler, F. Grzelka, A. PolzeProceedings of the 2nd Workshop on Disruptive Memory SystemsAssociation for Computing Machinery2024.
10.1145/3698783.3699386 [BibTex]

🗙

BibTex Entry

@inproceedings{Eberhardt:2024,
author = {Eberhardt, F. and Grapentin, A. and Köhler, S. and Grzelka, F. and Polze, A.},
booktitle = {Proceedings of the 2nd Workshop on Disruptive Memory Systems},
date = {2024-11-03},
doi = {10.1145/3698783.3699386},
isbn = {9798400713033},
location = {New York, NY, USA},
pages = {25–32},
publisher = {Association for Computing Machinery},
series = {DIMES '24},
title = {Moses: Heap Partitioning for Semantic Data Tiering},
venue = {Austin, TX, USA},
}

Close

Memento
Novel Memory Technologies for Multi-Tenant Exploratory Programming

F. Grzelka, S. Köhler, A. PolzeProceedings of the 2nd Workshop on Disruptive Memory SystemsAssociation for Computing Machinery2024.
10.1145/3698783.3699379 [BibTex]

🗙

BibTex Entry

@inproceedings{Grzelka:2024,
author = {Grzelka, F. and Köhler, S. and Polze, A.},
booktitle = {Proceedings of the 2nd Workshop on Disruptive Memory Systems},
date = {2024-11-03},
doi = {10.1145/3698783.3699379},
isbn = {9798400713033},
location = {New York, NY, USA},
pages = {60–63},
publisher = {Association for Computing Machinery},
series = {DIMES '24},
title = {Novel Memory Technologies for Multi-Tenant Exploratory Programming},
venue = {Austin, TX, USA},
}

Close

VAMPIR C
On-The-Fly Data Distribution to Accelerate Query Processing in Heterogeneous Memory Systems

André Berthold, Lennart Schmidt, Anton Obersteiner, Dirk Habich, Wolfgang Lehner, Horst SchirmeierAdvances in Databases and Information SystemsSpringer Nature Switzerland2024.
10.1007/978-3-031-70626-4_12 [BibTex]

🗙

BibTex Entry

@inproceedings{Berthold:2024,
abstract = {To meet response time and throughput demands, data processing architects continuously adapt query processing systems to novel hardware features. For instance, data processing systems already shifted from disk-oriented to main memory-oriented architectures to efficiently exploit the ever-increasing capacities of main memory. A prominent example for such new developments are emerging memory technologies such as very large caches, high-bandwidth memory (HBM), non-uniform memory access (NUMA) or remote-memory designs like CXL. These memories complement regular DRAM by trading off between properties such as capacity, read/write throughput or access latency. However, these degrees of freedom and their inherent complexity make it difficult for database systems to profit from the new hardware.},
author = {Berthold, Andr{é} and Schmidt, Lennart and Obersteiner, Anton and Habich, Dirk and Lehner, Wolfgang and Schirmeier, Horst},
booktitle = {Advances in Databases and Information Systems},
date = {2024-09-01},
doi = {10.1007/978-3-031-70626-4_12},
editor = {Tekli, Joe and Gamper, Johann and Chbeir, Richard and Manolopoulos, Yannis},
isbn = {978-3-031-70626-4},
location = {Cham},
pages = {170–183},
publisher = {Springer Nature Switzerland},
title = {On-The-Fly Data Distribution to Accelerate Query Processing in Heterogeneous Memory Systems},
}

Close

SMAUG
Performance Models for Task-based Scheduling with Disruptive Memory Technologies

Birte Friesel, Marcel Lütke Dreimann, Olaf SpinczykProceedings of the 2nd Workshop on Disruptive Memory SystemsAssociation for Computing Machinery2024.
10.1145/3698783.3699376 [BibTex]

🗙

BibTex Entry

@inproceedings{Friesel:2024,
author = {Friesel, Birte and Lütke Dreimann, Marcel and Spinczyk, Olaf},
booktitle = {Proceedings of the 2nd Workshop on Disruptive Memory Systems},
date = {2024-11-03},
doi = {10.1145/3698783.3699376},
isbn = {9798400713033},
location = {New York, NY, USA},
pages = {1–8},
publisher = {Association for Computing Machinery},
series = {DIMES '24},
title = {Performance Models for Task-based Scheduling with Disruptive Memory Technologies},
url = {https://ess.cs.uos.de/static/papers/Friesel-2024-DIMES.pdf},
venue = {Austin, TX, USA},
}

Close

Memento NEON
Profiling with Trust: System Monitoring from Trusted Execution Environments

Christian Eichler, Jonas Röckl, Benedikt Jung, Ralph Schlenk, Tilo Müller, Timo HönigDesign Automation for Embedded Systems28.1Springer2024.
10.1007/s10617-024-09283-1 [BibTex]

🗙

BibTex Entry

@article{Eichler:2024,
author = {Christian Eichler and Jonas Röckl and Benedikt Jung and Ralph Schlenk and Tilo Müller and Timo Hönig},
date = {2024-02-16},
doi = {10.1007/s10617-024-09283-1},
issn = {1572-8080},
journaltitle = {Design Automation for Embedded Systems},
number = {1},
pages = {23–44},
publisher = {Springer},
pubstate = {published},
title = {Profiling with Trust: System Monitoring from Trusted Execution Environments},
volume = {28},
year = {2024},
}

Close

HetCIM CIMware
SHERLOCK: Scheduling Efficient and Reliable Bulk Bitwise Operations in NVMs

Hamid Farzaneh, João Paulo Cardoso de Lima, Ali Nezhadi Khelejani, Asif Ali Khan, Mahta Mayahinia, Mehdi Tahoori, Jeronimo CastrillonProceedings of the 61th Annual Design Automation Conference (DAC'24)Association for Computing Machinery2024.
10.1145/3649329.3658485 [BibTex]

🗙

BibTex Entry

@inproceedings{Farzaneh:2024,
author = {Farzaneh, Hamid and de Lima, João Paulo Cardoso and Khelejani, Ali Nezhadi and Khan, Asif Ali and Mayahinia, Mahta and Tahoori, Mehdi and Castrillon, Jeronimo},
booktitle = {Proceedings of the 61th Annual Design Automation Conference (DAC'24)},
date = {2024-11-07},
doi = {10.1145/3649329.3658485},
eid = {293},
eventdate = {2024-06-23},
isbn = {9798400706011},
location = {New York, NY, USA},
publisher = {Association for Computing Machinery},
series = {DAC '24},
title = {SHERLOCK: Scheduling Efficient and Reliable Bulk Bitwise Operations in NVMs},
url = {https://www.cfaed.tu-dresden.de/files/Images/people/chair-cc/publications/2406_Farzaneh_DAC.pdf},
venue = {San Francisco, CA, USA},
}

Close

Conference Anchor A
SPP: Safe Persistent Pointers for Memory Safety

Dimitrios Stavrakakis, Alexandrina Panfil, MJin Nam, Pramod BhatotiaProceedings of the 54th IEEE/IFIP International Conference on Dependable Systems and Networks (DSN '24)2024.
10.1109/DSN58291.2024.00019 [BibTex]

🗙

BibTex Entry

@inproceedings{Stavrakakis:2024,
author = {Stavrakakis, Dimitrios and Panfil, Alexandrina and Nam, MJin and Bhatotia, Pramod},
booktitle = {Proceedings of the 54th IEEE/IFIP International Conference on Dependable Systems and Networks (DSN '24)},
comment-marcel = {SPP grant declaration broken},
date = {2024-08},
doi = {10.1109/DSN58291.2024.00019},
entrysubtype = {Conference},
title = {SPP: Safe Persistent Pointers for Memory Safety},
}

Close

Conference HetCIM B
Smoothing Disruption Across the Stack: Tales of Memory, Heterogeneity, & Compilers

M. Niemier, Z. Enciso, M. Sharifi, X. S. Hu, Ian O'Connor, A. Graening, R. Sharma, P. Gupta, J. Castrillon, J. P. C. de Lima, A. A. Khan, H. Farzaneh, N. Afroze, A. Khan, Julien RyckaertProceedings of the 2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)IEEE2024.
10.23919/DATE58400.2024.10546772 [BibTex]

🗙

BibTex Entry

@inproceedings{Niemier:2024,
abstract = {Multiple research vectors represent possible paths to improved energy and performance metrics at the application-level. There are active efforts with respect to emerging logic devices, new memory technologies, novel interconnects, and heterogeneous integration architectures. Of great interest is quantifying the potential impact of a given solution to prioritize research vectors accordingly. In this paper, we discuss two efforts - one focused on emerging memory technology, and another focused on heterogeneous integration technology - that speak to best practices for, and needed contributions from the design automation ({DA}) community to explore this vast design space. Furthermore, we highlight new research efforts that aim to develop the novel compiler abstractions and frameworks that are ultimately needed to derive maximum value from new memory and/or heterogeneous and monolithic integration architecture, and that can also play an important role with respect to design space exploration efforts.},
author = {Niemier, M. and Enciso, Z. and Sharifi, M. and Hu, X. S. and O'Connor, Ian and Graening, A. and Sharma, R. and Gupta, P. and Castrillon, J. and de Lima, J. P. C. and Khan, A. A. and Farzaneh, H. and Afroze, N. and Khan, A. and Ryckaert, Julien},
booktitle = {Proceedings of the 2024 Design, Automation \& Test in Europe Conference \& Exhibition ({DATE})},
date = {2024-03},
doi = {10.23919/DATE58400.2024.10546772},
entrysubtype = {Conference},
issn = {1558-1101},
keywords = {Measurement, Smoothing methods, Design automation, Field effect transistors, Multichip modules, Monolithic integrated circuits, Computer architecture, Compute-in-memory, associative memory, cross-bar architectures, ferroelectric field effect transistors ({FeFETs}), distance functions, heterogeneous integration, chiplet, pathfinding, compilers},
pages = {1–10},
publisher = {IEEE},
series = {{DATE} '24},
shorttitle = {Smoothing Disruption Across the Stack},
title = {Smoothing Disruption Across the Stack: Tales of Memory, Heterogeneity, \& Compilers},
url = {https://ieeexplore.ieee.org/document/10546772},
}

Close

PIMPMe C
So Far and yet so Near - Accelerating Distributed Joins with CXL

Alexander Baumstark, Marcus Paradies, Kai-Uwe Sattler, Steffen Kläbe, Stephan BaumannProceedings of the 20th International Workshop on Data Management on New HardwareAssociation for Computing Machinery2024.
10.1145/3662010.3663449 [BibTex]

🗙

BibTex Entry

@inproceedings{Baumstark:2024,
abstract = {Distributed partitioned joins are one of the most expensive operators in distributed {DBMSs} where a major part of the execution is attributed to network transfer costs. Although high-speed network technologies, such as {RDMA}, can lower this cost, they still come with significantly higher latency than local {DRAM} access. The emerging {CXL} interconnect protocol promises to provide direct and cache-coherent access to remote memory while offering byte-addressable memory access without {CPU} intervention. For short-distance communication in distributed {DBMSs}, {CXL} represents an interesting alternative for low-latency requirements. In this work, we explore how {CXL} can be leveraged for engine-internal communication and data exchange. We discuss and apply communication strategies to distributed joins. We emulate various {CXL} characteristics based on optimistic and pessimistic assumptions on the real performance of upcoming {CXL} devices and evaluate their impact on the execution of distributed joins. Our results show that {CXL} has the potential to improve distributed join performance.},
author = {Baumstark, Alexander and Paradies, Marcus and Sattler, Kai-Uwe and Kläbe, Steffen and Baumann, Stephan},
booktitle = {Proceedings of the 20th International Workshop on Data Management on New Hardware},
date = {2024-06-09},
doi = {10.1145/3662010.3663449},
eid = {7},
isbn = {9798400706677},
location = {New York, {NY}, {USA}},
publisher = {Association for Computing Machinery},
series = {{DaMoN} '24},
title = {So Far and yet so Near - Accelerating Distributed Joins with {CXL}},
url = {https://dl.acm.org/doi/10.1145/3662010.3663449},
}

Close

CIMware
Testing ReRAM-based TCAM for Computation-in-Memory Applications

Haneen G. Hezayyin, Mahta Mayahinia, Mehdi Tahoori2024 IEEE International Conference on Design, Test and Technology of Integrated Systems (DTTIS)2024.
10.1109/DTTIS62212.2024.10780399 [BibTex]

🗙

BibTex Entry

@inproceedings{Hezayyin:2024,
abstract = {Computation in memory ({CiM}) can potentially mitigate the high energy and latency associated with the back-and-forth data transfer between the processor core and memory sub-systems. This bottleneck is known as the memory wall problem and is further pressed by data-intensive applications. Measuring the similarity between two binary patterns is a data-intensive, highly frequent kernel in many modern applications that can be accelerated using the {CiM} concept. Content addressable memory ({CAM}) and its ternary version ({TCAM}) are the specific {CiM} blocks for the task of binary pattern similarity measurements. The performance and energy efficiency of the {TCAM} can be further improved by utilizing the emerging resistive non-volatile memory ({NVM}). Among different {NVM} technologies, redox-based {RAM} ({ReRAM}) is a promising candidate to be implemented within the {NVM}-based {TCAM}, mainly due to its highly distinct resistive levels. Besides the performance and energy benefits of the {ReRAM}-based {TCAM} ({ReTCAM}), its high functional quality is of utmost importance and needs to be carefully taken into account. More specifically, the co-integration of the {ReRAM} and transistor technologies results in new fault behaviors. To assure the high quality of the {ReTCAM}, in this paper, we aim to develop a March-like test algorithm tailored for {ReTCAM} array. The proposed March-like test algorithm is extendable and can achieve 100\% fault coverage.},
author = {Hezayyin, Haneen G. and Mayahinia, Mahta and Tahoori, Mehdi},
booktitle = {2024 {IEEE} International Conference on Design, Test and Technology of Integrated Systems ({DTTIS})},
date = {2024-12-13},
doi = {10.1109/DTTIS62212.2024.10780399},
eventdate = {2024-10-14},
eventtitle = {2024 {IEEE} International Conference on Design, Test and Technology of Integrated Systems ({DTTIS})},
isbn = {9798350363128},
issn = {2832-823X},
keywords = {Fabrication, Associative memory, Nonvolatile memory, Random access memory, Data transfer, Energy efficiency, Transistors, Kernel, Testing},
pages = {1–4},
title = {Testing {ReRAM}-based {TCAM} for Computation-in-Memory Applications},
url = {https://ieeexplore.ieee.org/abstract/document/10780399},
venue = {Aix-EN-PROVENCE, France},
}

Close

ParPerOS Best Paper Award
The New Costs of Physical Memory Fragmentation

A. Halbuer, I. Ostapyshyn, L. Steiner, L. Wrenger, M. Jung, C. Dietrich, D. LohmannProceedings of the 2nd Workshop on Disruptive Memory SystemsAssociation for Computing Machinery2024Best Paper Award.
10.1145/3698783.3699378 [BibTex]

🗙

BibTex Entry

@inproceedings{Halbuer:2024,
author = {Halbuer, A. and Ostapyshyn, I. and Steiner, L. and Wrenger, L. and Jung, M. and Dietrich, C. and Lohmann, D.},
booktitle = {Proceedings of the 2nd Workshop on Disruptive Memory Systems},
comment = {Best Paper Award},
date = {2024-11-03},
doi = {10.1145/3698783.3699378},
isbn = {9798400713033},
location = {New York, NY, USA},
pages = {33–40},
publisher = {Association for Computing Machinery},
series = {DIMES '24},
title = {The New Costs of Physical Memory Fragmentation},
venue = {Austin, TX, USA},
}

Close

HYPNOS
To Keep or Not to Keep - The Volatility of Replacement Policy Metadata in Hybrid Caches

N. Wilbert, S. Wildermann, J. TeichProceedings of the 2nd Workshop on Disruptive Memory SystemsAssociation for Computing Machinery2024.
10.1145/3698783.3699381 [BibTex]

🗙

BibTex Entry

@inproceedings{Wilbert:2024,
author = {Wilbert, N. and Wildermann, S. and Teich, J.},
booktitle = {Proceedings of the 2nd Workshop on Disruptive Memory Systems},
date = {2024-11-03},
doi = {10.1145/3698783.3699381},
isbn = {9798400713033},
location = {New York, NY, USA},
pages = {17–24},
publisher = {Association for Computing Machinery},
series = {DIMES '24},
title = {To Keep or Not to Keep - The Volatility of Replacement Policy Metadata in Hybrid Caches},
venue = {Austin, TX, USA},
}

Close

Conference Anchor B
Toast: A Heterogeneous Memory Management System

Maurice Bailleu, Dimitrios Stavrakakis, Rodrigo Rocha, Soham Chakraborty, Deepak Garg, Pramod BhatotiaProceedings of the International Conference on Parallel Architectures and Compilation Techniques (PACT) 2024,Association for Computing Machinery2024.
10.1145/3656019.3676944 [BibTex]

🗙

BibTex Entry

@inproceedings{Bailleu:2024,
author = {Bailleu, Maurice and Stavrakakis, Dimitrios and Rocha, Rodrigo and Chakraborty, Soham and Garg, Deepak and Bhatotia, Pramod},
booktitle = {Proceedings of the International Conference on Parallel Architectures and Compilation Techniques (PACT) 2024,},
date = {2024-10-13},
doi = {10.1145/3656019.3676944},
entrysubtype = {Conference},
isbn = {9798400706318},
location = {Long Beach, California, USA},
pages = {53–65},
publisher = {Association for Computing Machinery},
series = {PACT '24},
title = {Toast: A Heterogeneous Memory Management System},
}

Close

ARTS-NVM
Towards Enabling Synchronous Releases for Periodic Tasks in RTEMS

Tristan Seidl, Mario Günzel, Jian-Jia Chen, Kuan-Hsun ChenProceedings of OSPERT 2024. The 18th Annual Workshop on Operating Systems Platforms for Embedded Real-Time Applications2024.
[BibTex]

🗙

BibTex Entry

@inproceedings{Seidl:2024,
author = {Tristan Seidl and Mario Günzel and Jian-Jia Chen and Kuan-Hsun Chen},
booktitle = {Proceedings of OSPERT 2024. The 18th Annual Workshop on Operating Systems Platforms for Embedded Real-Time Applications},
date = {2024-07-09},
location = {Lille, France},
pages = {13–18},
pubstate = {published},
series = {OSPERT 2024},
title = {Towards Enabling Synchronous Releases for Periodic Tasks in RTEMS},
url = {https://www.ecrts.org/wp-content/uploads/2024/07/ospert24-proceedings.pdf},
venue = {Lille, France},
year = {2024},
}

Close

ARTS-NVM
Towards Enabling Synchronous Releases for Periodic Tasks in RTEMS

Tristan Seidl, Mario Günzel, Jian-Jia Chen, Kuan-Hsun ChenThe 18th Annual Workshop on Operating Systems Platforms for Embedded Real-Time Applications (OSPERT)2024.
[BibTex]

🗙

BibTex Entry

@inproceedings{Seidl:2024a,
author = {Seidl, Tristan and Günzel, Mario and Chen, Jian-Jia and Chen, Kuan-Hsun},
booktitle = {The 18th Annual Workshop on Operating Systems Platforms for Embedded Real-Time Applications (OSPERT)},
date = {2024},
title = {Towards Enabling Synchronous Releases for Periodic Tasks in RTEMS},
url = {https://www.ecrts.org/wp-content/uploads/2024/07/ospert24-proceedings.pdf},
}

Close

Workshop ARTS-NVM MD
Towards Non-Volatile Memory Wear-Leveling In (Timing)-Critical Systems

Christian Hakert, Kay Heider, Junjie Shi, Jian-Jia Chen2nd Workshop on OPtimization for Embedded and ReAl-time systems (OPERA)2024.
[BibTex]

🗙

BibTex Entry

@inproceedings{Hakert:2024,
author = {Hakert, Christian and Heider, Kay and Shi, Junjie and Chen, Jian-Jia},
booktitle = {2nd Workshop on OPtimization for Embedded and ReAl-time systems (OPERA)},
date = {2024},
entrysubtype = {Workshop},
title = {Towards Non-Volatile Memory Wear-Leveling In (Timing)-Critical Systems},
url = {https://opera24.di.unito.it/wp-content/uploads/2024/11/1_Final_version.pdf},
}

Close

FOSSIL
Trustworthy Execution of O-RAN Applications by strong Separation and minimal Trusted Computing Base

Jana Eisoldt, Till MiemietzProceedings of the 2024 IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN) Doctoral SymposiumIEEE2024.
10.1109/NFV-SDN61811.2024.10807504 [BibTex]

🗙

BibTex Entry

@inproceedings{Eisoldt:2024,
abstract = {O-{RAN} allows the integration of virtualised third-party applications ({xApps}) for near-real time control of the Radio Access Network. We aim to minimise the risks of privilege escalation and kernel compromise by utilising a microkernel-based system for the execution of containers.},
author = {Eisoldt, Jana and Miemietz, Till},
booktitle = {Proceedings of the 2024 {IEEE} Conference on Network Function Virtualization and Software Defined Networks ({NFV}-{SDN}) Doctoral Symposium},
date = {2024-11},
doi = {10.1109/NFV-SDN61811.2024.10807504},
issn = {2832-2231},
keywords = {Trusted computing, Open {RAN}, Containers, Network function virtualization, Software defined networking, Kernel},
pages = {214–216},
publisher = {IEEE},
title = {Trustworthy Execution of {O-RAN} Applications by strong Separation and minimal Trusted Computing Base},
url = {https://ieeexplore.ieee.org/document/10807504},
}

Close

Memento NEON A
VeriFence: Lightweight and Precise Spectre Defenses for Untrusted Linux Kernel Extensions

Luis Gerhorst, Henriette Herzog, Peter Wägemann, Maximilian Ott, Rüdiger Kapitza, Timo HönigProceedings of the 27th International Symposium on Research in Attacks, Intrusions and DefensesAssociation for Computing Machinery2024.
10.1145/3678890.3678907 [BibTex]

🗙

BibTex Entry

@inproceedings{Gerhorst:2024,
abstract = {High-performance {IO} demands low-overhead communication between user- and kernel space. This demand can no longer be fulfilled by traditional system calls. Linux's extended Berkeley Packet Filter ({BPF}) avoids user-/kernel transitions by just-in-time compiling user-provided bytecode and executing it in kernel mode with near-native speed. To still isolate {BPF} programs from the kernel, they are statically analyzed for memory- and type-safety, which imposes some restrictions but allows for good expressiveness and high performance. However, to mitigate the Spectre vulnerabilities disclosed in 2018, defenses which reject potentially-dangerous programs had to be deployed. We find that this affects 31 \% to 54 \% of programs in a dataset with 844 real-world {BPF} programs from popular open-source projects. To solve this, users are forced to disable the defenses to continue using the programs, which puts the entire system at risk.To enable secure and expressive untrusted Linux kernel extensions, we propose {VeriFence}, an enhancement to the kernel's Spectre defenses that reduces the number of {BPF} application programs rejected from 54 \% to zero. We measure {VeriFence}'s overhead for all mainstream performance-sensitive applications of {BPF} (i.e., event tracing, profiling, and packet processing) and find that it improves significantly upon the status-quo where affected {BPF} programs are either unusable or enable transient execution attacks on the kernel.},
author = {Gerhorst, Luis and Herzog, Henriette and Wägemann, Peter and Ott, Maximilian and Kapitza, Rüdiger and Hönig, Timo},
booktitle = {Proceedings of the 27th International Symposium on Research in Attacks, Intrusions and Defenses},
date = {2024-09-30},
doi = {10.1145/3678890.3678907},
isbn = {9798400709593},
location = {New York, {NY}, {USA}},
pages = {644–659},
publisher = {Association for Computing Machinery},
series = {{RAID} '24},
shorttitle = {{VeriFence}},
title = {{VeriFence}: Lightweight and Precise Spectre Defenses for Untrusted Linux Kernel Extensions},
url = {https://dl.acm.org/doi/10.1145/3678890.3678907},
}

Close

PAVE
Virtual Memory Revisited for Tiered Memory

Oliver Giersch, Dustin Nguyen, Jörg Nolte, Wolfgang Schröder-PreikschatProceedings of the 15th ACM SIGOPS Asia-Pacific Workshop on SystemsAssociation for Computing Machinery2024.
10.1145/3678015.3680475 [BibTex]

🗙

BibTex Entry

@inproceedings{Giersch:2024,
abstract = {The landscape of memory technologies has grown substantially more diverse and heterogeneous, with a number of special-purpose memory technologies reaching market maturity in recent years, such as NVRAM (Non-Volatile Memory), HBM (High-Bandwidth Memory) or the upcoming CXL.mem. Future computing systems will have to contend with byte-addressable and cache-coherent main memory that is highly diverse, either in terms of the fundamental performance characteristics of its underlying memory technology, or due to the fact that CXL.mem will allow accessing homogenous but remote memory. The VM (Virtual Memory) subsystems of today have been empirically optimized over decades, but were designed for a single tier of main memory only. While recent approaches that integrated tiered memory have focused on better memory access metrics to improve page placement strategies, we seek to leverage the proven heuristics that are already in place. In times of high load we assign pages from slower memory, demote inactive pages according to standard page replacement strategies and use lazy page promotions when sufficient resources are available again to retain the inherently high reactivity of demand paging with regard to working set changes. We integrate these mechanisms into the VM subsystem of a full-featured mainstream operating system (FreeBSD) with minimal adaptations. The resulting multi-tier VM system runs in a stable and efficient manner under high stress even with highly unfavorable work loads.},
location = {New York, NY, USA},
author = {Giersch, Oliver and Nguyen, Dustin and Nolte, Jörg and Schröder-Preikschat, Wolfgang},
booktitle = {Proceedings of the 15th ACM SIGOPS Asia-Pacific Workshop on Systems},
date = {2024},
doi = {10.1145/3678015.3680475},
isbn = {9798400711053},
keywords = {Operating Systems, Resource disaggregation},
location = {Kyoto, Japan},
numpages = {7},
pages = {1–7},
publisher = {Association for Computing Machinery},
series = {APSys ’24},
title = {Virtual Memory Revisited for Tiered Memory},
url = {https://doi.org/10.1145/3678015.3680475},
}

Close

Memento NEON
carbond: An Operating-System Daemon for Carbon Awareness

Andreas Schmidt, Gregory Stock, Robin Ohs, Luis Gerhorst, Benedict Herzog, Timo HönigSIGENERGY Energy Informatics Review4.32024.
10.1145/3698365.3698374 [BibTex]

🗙

BibTex Entry

@article{Schmidt:2024,
abstract = {To reduce the carbon footprint of software, it is imperative that systems first become aware of their footprint. Despite various proposals to make software carbon aware via application-level development kits, we believe awareness of and adjustment to carbon-emission information is an operating-system duty—similar to how it manages time information today. In this paper, we motivate and envision carbond, a Linux-based service to mediate carbon information between hardware (including power supply) and application-level software. Following the recently established Software Carbon Intensity ({SCI}) standard, carbond deals with operational as well as embodied emissions and has different units of work (low level as {CPU} cycle up to high-level as user request) in mind. In addition to the service itself, we showcase how it can be used by application {SDKs} (libraries) as well as command-line utilities.},
author = {Schmidt, Andreas and Stock, Gregory and Ohs, Robin and Gerhorst, Luis and Herzog, Benedict and Hönig, Timo},
date = {2024-09-30},
doi = {10.1145/3698365.3698374},
journaltitle = {{SIGENERGY} Energy Informatics Review},
number = {3},
pages = {52–57},
shorttitle = {carbond},
title = {carbond: An Operating-System Daemon for Carbon Awareness},
url = {https://dl.acm.org/doi/10.1145/3698365.3698374},
volume = {4},
}

Close

2023

SMAUG
A Full-System Perspective on UPMEM Performance

Birte Friesel, Marcel Lütke Dreimann, Olaf SpinczykProceedings of the 1st Workshop on Disruptive Memory SystemsAssociation for Computing Machinery2023.
10.1145/3609308.3625266 [BibTex]

🗙

BibTex Entry

@inproceedings{Friesel:2023,
author = {Friesel, Birte and Lütke Dreimann, Marcel and Spinczyk, Olaf},
booktitle = {Proceedings of the 1st Workshop on Disruptive Memory Systems},
date = {2023-10-23},
doi = {10.1145/3609308.3625266},
isbn = {9798400703003},
pages = {1-7},
publisher = {Association for Computing Machinery},
pubstate = {published},
series = {DIMES '23},
title = {A Full-System Perspective on UPMEM Performance},
year = {2023},
}

Close

PIMPMe
Accelerating Large Table Scan Using Processing-In-Memory Technology

Alexander Baumstark, Muhammad Attahir Jibril, Kai-Uwe SattlerDatenbank-Spektrum23.32023.
10.1007/s13222-023-00456-z [BibTex]

🗙

BibTex Entry

@article{Baumstark:2023,
author = {Alexander Baumstark and Muhammad Attahir Jibril and Kai-Uwe Sattler},
date = {2023-10-10},
doi = {10.1007/s13222-023-00456-z},
issn = {1610-1995},
journaltitle = {Datenbank-Spektrum},
number = {3},
pages = {199–209},
pubstate = {published},
title = {Accelerating Large Table Scan Using Processing-In-Memory Technology},
volume = {23},
year = {2023},
}

Close

PIMPMe
Accelerating Large Table Scan using Processing-In-Memory Technology

Alexander Baumstark, Muhammad Attahir Jibril, Kai-Uwe SattlerBTW 2023Gesellschaft für Informatik e.V.2023.
10.18420/BTW2023-51 [BibTex]

🗙

BibTex Entry

@incollection{Baumstark:2023c,
author = {Alexander Baumstark and Muhammad Attahir Jibril and Kai-Uwe Sattler},
booktitle = {BTW 2023},
comment = {CORE2023 National:Germany},
date = {2023},
doi = {10.18420/BTW2023-51},
isbn = {978-3-88579-725-8},
location = {Bonn},
pages = {797–814},
publisher = {Gesellschaft für Informatik e.V.},
pubstate = {published},
title = {Accelerating Large Table Scan using Processing-In-Memory Technology},
}

Close

PIMPMe
Adaptive Query Compilation with Processing-in-Memory

Alexander Baumstark, Muhammad Attahir Jibril, Kai-Uwe Sattler2023 IEEE 39th International Conference on Data Engineering Workshops (ICDEW)2023.
10.1109/ICDEW58674.2023.00035 [BibTex]

🗙

BibTex Entry

@inproceedings{Baumstark:2023b,
author = {Alexander Baumstark and Muhammad Attahir Jibril and Kai-Uwe Sattler},
booktitle = {2023 IEEE 39th International Conference on Data Engineering Workshops (ICDEW)},
date = {2023-04},
doi = {10.1109/ICDEW58674.2023.00035},
issn = {2473-3490},
pages = {191–197},
pubstate = {published},
title = {Adaptive Query Compilation with Processing-in-Memory},
}

Close

PIMPMe
Adaptive update handling for graph HTAP

Muhammad Attahir Jibril, Alexander Baumstark, Kai-Uwe SattlerDistributed and Parallel Databases41.32023.
10.1007/s10619-023-07428-y [BibTex]

🗙

BibTex Entry

@article{Jibril:2023,
abstract = {Hybrid transactional/analytical processing ({HTAP}) workloads on graph data can significantly benefit from {GPU} accelerators. However, to exploit the full potential of {GPU} processing, dedicated graph representations are necessary, which mostly make in-place updates difficult. In this paper, we discuss an adaptive update handling approach in a graph database system for {HTAP} workloads. We discuss and evaluate strategies for propagating transactional updates from an update-friendly table storage to a {GPU}-optimized sparse matrix format for analytics.},
author = {Jibril, Muhammad Attahir and Baumstark, Alexander and Sattler, Kai-Uwe},
date = {2023-09-01},
doi = {10.1007/s10619-023-07428-y},
issn = {1573-7578},
journaltitle = {Distributed and Parallel Databases},
keywords = {Graph data management, {HTAP}, {GPU} accelerator, Delta store, Cost model, {CSR}},
langid = {english},
number = {3},
pages = {331–357},
shortjournal = {Distrib Parallel Databases},
title = {Adaptive update handling for graph {HTAP}},
url = {https://doi.org/10.1007/s10619-023-07428-y},
volume = {41},
}

Close

FOSSIL
An NVM Performance Study Towards Whole System Persistence on Server Platforms

Till Miemietz, Viktor Reusch, Michael Roitzsch, Hermann HärtigProceedings of the 1st Workshop on Disruptive Memory SystemsAssociation for Computing Machinery2023.
10.1145/3609308.3625269 [BibTex]

🗙

BibTex Entry

@inproceedings{Miemietz:2023,
abstract = {Whole system persistence ({WSP}) is a concept for retaining the computational state of a system even in case of a power failure. In the context of server systems, {WSP} could render it possible to quickly power on and off machines that only need to be used occasionally, thus saving energy. This paper takes on this idea and discusses multiple approaches for implementing {WSP} on such machines. Our evaluation shows that after starting a system, an {NVM}-based version of {WSP} can achieve tail latency improvements of up to 93\% compared to booting a system and loading data from an {SSD}. At the same time, {WSP} is able to provide suspend and resume times in the order of tens of milliseconds.},
author = {Miemietz, Till and Reusch, Viktor and Roitzsch, Michael and Härtig, Hermann},
booktitle = {Proceedings of the 1st Workshop on Disruptive Memory Systems},
date = {2023-10-23},
doi = {10.1145/3609308.3625269},
isbn = {9798400703003},
location = {New York, {NY}, {USA}},
pages = {45–51},
publisher = {Association for Computing Machinery},
series = {{DIMES} '23},
title = {An {NVM} Performance Study Towards Whole System Persistence on Server Platforms},
url = {https://dl.acm.org/doi/10.1145/3609308.3625269},
venue = {Koblenz, Germany},
}

Close

Conference Anchor A*
Anchor: A Library for Building Secure Persistent Memory Systems

Dimitrios Stavrakakis, Dimitra Giantsidi, Maurice Bailleu, Philip Sändig, Shady Issa, Pramod BhatotiaProceedings of the 2024 International Conference on Management of Data (SIGMOD ’24)Association for Computing Machinery2023.
10.1145/3626718 [BibTex]

🗙

BibTex Entry

@inproceedings{Stavrakakis:2023,
author = {Stavrakakis, Dimitrios and Giantsidi, Dimitra and Bailleu, Maurice and Sändig, Philip and Issa, Shady and Bhatotia, Pramod},
booktitle = {Proceedings of the 2024 International Conference on Management of Data (SIGMOD ’24)},
comment-marcel = {SPP grant broken},
date = {2023-12},
doi = {10.1145/3626718},
entrysubtype = {Conference},
location = {New York, NY, USA},
number = {4},
publisher = {Association for Computing Machinery},
pubstate = {published},
title = {Anchor: A Library for Building Secure Persistent Memory Systems},
volume = {1},
}

Close

NEON PAVE
Back to the Core-Memory Age: Running Operating Systems in NVRAM only

Jonas Rabenstein, Dustin Nguyen, Oliver Giersch, Christian Eichler, Timo Hönig, Jörg Nolte, Wolfgang Schröder-PreikschatProceedings of the 36th International Conference on Architecture of Computing Systems (ARCS'23)2023.
10.1007/978-3-031-42785-5_11 [BibTex]

🗙

BibTex Entry

@inproceedings{Rabenstein:2023a,
author = {Jonas Rabenstein and Dustin Nguyen and Oliver Giersch and Christian Eichler and Timo Hönig and Jörg Nolte and Wolfgang Schröder-Preikschat},
booktitle = {Proceedings of the 36th International Conference on Architecture of Computing Systems (ARCS'23)},
date = {2023},
doi = {10.1007/978-3-031-42785-5_11},
location = {Athens, Greece},
pages = {153–167},
pubstate = {published},
title = {Back to the Core-Memory Age: Running Operating Systems in NVRAM only},
}

Close

Memento NEON
Carbon-Aware Memory Placement

Sven Köhler, Lukas Wenzel, Andreas Polze, Benedict Herzog, Henriette Hofmeier, Manuel Vögele, Timo Hönig2nd Workshop on Sustainable Computer Systems (HotCarbon '23)ACM2023.
10.1145/3604930.3605714 [BibTex]

🗙

BibTex Entry

@inproceedings{Koehler:2023,
author = {Sven Köhler and Lukas Wenzel and Andreas Polze and Benedict Herzog and Henriette Hofmeier and Manuel Vögele and Timo Hönig},
booktitle = {2nd Workshop on Sustainable Computer Systems (HotCarbon '23)},
date = {2023-07},
doi = {10.1145/3604930.3605714},
isbn = {979-8-4007-0242-6},
location = {Boston, MA, USA},
publisher = {ACM},
pubstate = {published},
title = {Carbon-Aware Memory Placement},
}

Close

Poster NEON PAVE Memento
Efficient NVRAM-Based General Purpose Operating Systems

Oliver Giersch, Henriette Hofmeier, Dustin Nguyen, Jonas Rabenstein, Christian Eichler17th USENIX Symposium on Operating Systems Design and Implementation2023.
Poster 10.13154/294-10272 [BibTex]

🗙

BibTex Entry

@inproceedings{Giersch:2023,
author = {Giersch, Oliver and Hofmeier, Henriette and Nguyen, Dustin and Rabenstein, Jonas and Eichler, Christian},
booktitle = {17th USENIX Symposium on Operating Systems Design and Implementation},
date = {2023},
doi = {10.13154/294-10272},
entrysubtype = {Poster},
organization = {USENIX},
series = {OSDI '23 Poster Session},
title = {Efficient {NVRAM}-Based General Purpose Operating Systems},
}

Close

ParPerOS
Evaluation and Refinement of an Explicit Virtual-Memory Primitive

Yannick Loeck, Christian DietrichIEEE Access11IEEE2023.
10.1109/ACCESS.2023.3338149 [BibTex]

🗙

BibTex Entry

@article{Loeck:2023,
author = {Yannick Loeck and Christian Dietrich},
date = {2023-11-30},
doi = {10.1109/ACCESS.2023.3338149},
issn = {2169-3536},
journaltitle = {IEEE Access},
keywords = {Kernel;Linux;Memory management;Instruction sets;Surface treatment;Resource management;Process control;Virtual memory;explicit file-mapped I/O;high-performance I/O;user-space solution;buffer manager;performance optimization},
pages = {136855-136868},
publisher = {IEEE},
pubstate = {published},
title = {Evaluation and Refinement of an Explicit Virtual-Memory Primitive},
volume = {11},
year = {2023},
}

Close

PIMPMe A
Fast and Efficient Update Handling for Graph H\textsuperscript{2}TAP

Muhammad Attahir Jibril, Hani Al-Sayeh, Alexander Baumstark, Kai-Uwe SattlerProceedings of the 26th International Conference on Extending Database TechnologyOpenproceedings.org2023.
10.48786/edbt.2023.60 [BibTex]

🗙

BibTex Entry

@inproceedings{Jibril:2023a,
accessdate = {2025-05-06},
author = {Jibril, Muhammad Attahir and Al-Sayeh, Hani and Baumstark, Alexander and Sattler, Kai-Uwe},
booktitle = {Proceedings of the 26th International Conference on Extending Database Technology},
date = {2023},
doi = {10.48786/edbt.2023.60},
isbn = {978-3-89318-092-9},
pages = {723–736},
publisher = {Openproceedings.org},
series = {{EDBT} 2023},
title = {Fast and Efficient Update Handling for Graph H\\textsuperscript\{2\}TAP},
url = {https://openproceedings.org/2023/conf/edbt/3-paper-113.pdf},
volume = {3},
}

Close

Workshop SMASH
Intelligent Data Migration Policies in a Write-Optimized Copy-on-Write Tiered Storage Stack

Johannes Wünsche, Sajad Karim, Michael Kuhn, David Broneske, Gunter SaakeProceedings of the 3rd Workshop on Challenges and Opportunities of Efficient and Performant Storage Systems, CHEOPS 2023, Rome, Italy, 8 May 2023ACM2023.
10.1145/3578353.3589543 [BibTex]

🗙

BibTex Entry

@inproceedings{Wuensche:2023,
author = {Johannes Wünsche and Sajad Karim and Michael Kuhn and David Broneske and Gunter Saake},
booktitle = {Proceedings of the 3rd Workshop on Challenges and Opportunities of Efficient and Performant Storage Systems, CHEOPS 2023, Rome, Italy, 8 May 2023},
date = {2023-05-08},
doi = {10.1145/3578353.3589543},
editor = {Jean-Thomas Acquaviva and Shadi Ibrahim and Suren Byna},
entrysubtype = {Workshop},
pages = {17–26},
publisher = {ACM},
pubstate = {published},
title = {Intelligent Data Migration Policies in a Write-Optimized Copy-on-Write Tiered Storage Stack},
year = {2023},
}

Close

ParPerOS A Distinguished Artifact Award
LLFree: Scalable and Optionally-Persistent Page-Frame Allocation

Lars Wrenger, Florian Rommel, Alexander Halbuer, Christian Dietrich, Daniel Lohmann2023 USENIX Annual Technical Conference (USENIX ATC 23)USENIX Association2023Distinguished Artifact Award.
[BibTex]

🗙

BibTex Entry

@inproceedings{Wrenger:2023,
author = {Lars Wrenger and Florian Rommel and Alexander Halbuer and Christian Dietrich and Daniel Lohmann},
booktitle = {2023 USENIX Annual Technical Conference (USENIX ATC 23)},
date = {2023-07},
isbn = {978-1-939133-35-9},
location = {Boston, MA},
pages = {897–914},
publisher = {USENIX Association},
pubstate = {published},
title = {LLFree: Scalable and Optionally-Persistent Page-Frame Allocation},
url = {https://www.usenix.org/conference/atc23/presentation/wrenger},
}

Close

Conference NEON A
Luci: Loader-based Dynamic Software Updates for Off-the-shelf Shared Objects

Bernhard Heinloth, Peter Wägemann, Wolfgang Schröder-Preikschat2023 USENIX Annual Technical Conference (USENIX ATC 23)USENIX Association2023.
PDF Slides [BibTex]

🗙

BibTex Entry

@inproceedings{Heinloth:2023,
author = {Heinloth, Bernhard and Wägemann, Peter and Schröder-Preikschat, Wolfgang},
booktitle = {2023 USENIX Annual Technical Conference (USENIX ATC 23)},
date = {2023-07},
entrysubtype = {Conference},
isbn = {978-1-939133-35-9},
keywords = {NEON},
location = {Boston, MA},
pages = {241–256},
publisher = {USENIX Association},
pubstate = {published},
title = {Luci: Loader-based Dynamic Software Updates for Off-the-shelf Shared Objects},
url = {https://www.usenix.org/conference/atc23/presentation/heinloth},
}

Close

ParPerOS A
MELF: Multivariant Executables for a Heterogeneous World

Dominik Töllner, Christian Dietrich, Illia Ostapyshyn, Florian Rommel, Daniel Lohmann2023 USENIX Annual Technical Conference (USENIX ATC 23)USENIX Association2023.
[BibTex]

🗙

BibTex Entry

@inproceedings{Toellner:2023,
author = {Dominik Töllner and Christian Dietrich and Illia Ostapyshyn and Florian Rommel and Daniel Lohmann},
booktitle = {2023 USENIX Annual Technical Conference (USENIX ATC 23)},
date = {2023-07},
isbn = {978-1-939133-35-9},
location = {Boston, MA},
publisher = {USENIX Association},
pubstate = {published},
title = {MELF: Multivariant Executables for a Heterogeneous World},
url = {https://www.usenix.org/conference/atc23/presentation/tollner},
}

Close

Poster Memento NEON
Memento: Energy-Aware Memory Placement in Operating Systems

Sven Köhler, Benedict Herzog, Henriette Hofmeier, Manuel Vögele, Lukas Wenzel17th Symposium on Operating Systems Design and Implementation (OSDI'23), Poster Session2023.
PDF Poster 10.13154/294-10271 [BibTex]

🗙

BibTex Entry

@inproceedings{Koehler:2023a,
author = {Köhler, Sven and Herzog, Benedict and Hofmeier, Henriette and Vögele, Manuel and Wenzel, Lukas},
booktitle = {17th Symposium on Operating Systems Design and Implementation (OSDI'23), Poster Session},
date = {2023},
doi = {10.13154/294-10271},
entrysubtype = {Poster},
pages = {1–2},
title = {Memento: Energy-Aware Memory Placement in Operating Systems},
}

Close

ARTS-NVM
Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory

Nils Hölscher, Christian Hakert, Hassan Nassar, Kuan-Hsun Chen, Lars Bauer, Jian-Jia Chen, Jörg HenkelIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems42.82023.
10.1109/TCAD.2022.3228897 [BibTex]

🗙

BibTex Entry

@article{Hoelscher:2023a,
abstract = {Emerging nonvolatile memory yields, alongside many advantages, technical shortcomings, such as reduced cell lifetime. Although many wear-leveling approaches exist to extend the lifetime of such memories, usually a tradeoff for the granularity of wear leveling has to be made. Due to iterative write schemes (repeatedly sense and write), wear out of memory in certain systems is directly dependent on the written bit value and thus can be highly imbalanced, requiring dedicated bit-wise wear leveling. Such a bit-wise wear leveling so far has only be proposed together with a special hardware support. However, if no dedicated hardware solutions are available, especially for commercial off-the-shelf systems with nonvolatile memories, a software solution can be crucial for the system lifetime. In this work, we propose entirely software-based bit-wise wear leveling, where the position of bits within {CPU} words in the main memory is rotated on a regular basis. We leverage the {LLVM} intermediate representation to adjust load and store operations of the application with a custom compiler pass. Experimental evaluation shows that the lifetime by applying local rotation within the {CPU} word can be extended by a factor of up to 21{\\}times . We also show that our method can incorporate with coarser-grained wear leveling, e.g., on block granularity and assist achievement of higher lifetime improvements.},
author = {Hölscher, Nils and Hakert, Christian and Nassar, Hassan and Chen, Kuan-Hsun and Bauer, Lars and Chen, Jian-Jia and Henkel, Jörg},
date = {2023-08},
doi = {10.1109/TCAD.2022.3228897},
eventtitle = {{IEEE} Transactions on Computer-Aided Design of Integrated Circuits and Systems},
issn = {1937-4151},
journaltitle = {{IEEE} Transactions on Computer-Aided Design of Integrated Circuits and Systems},
keywords = {Nonvolatile memory, Memory management, Iterative methods, Computer architecture, Microprocessors, Synchronization, Hardware, Bit rotation, intermediate representation ({IR}), {LLVM}, nonvolatile main memory, wear leveling},
number = {8},
pages = {2527–2539},
shorttitle = {Memory Carousel},
title = {Memory Carousel: {LLVM}-Based Bitwise Wear Leveling for Nonvolatile Main Memory},
url = {https://ieeexplore.ieee.org/document/9984978},
volume = {42},
}

Close

ParPerOS
Morsels: Explicit Virtual Memory Objects

Alexander Halbuer, Christian Dietrich, Florian Rommel, Daniel LohmannProceedings of the 1st Workshop on Disruptive Memory SystemsAssociation for Computing Machinery2023.
10.1145/3609308.3625267 [BibTex]

🗙

BibTex Entry

@inproceedings{Halbuer:2023,
author = {Alexander Halbuer and Christian Dietrich and Florian Rommel and Daniel Lohmann},
booktitle = {Proceedings of the 1st Workshop on Disruptive Memory Systems},
date = {2023-10-23},
doi = {10.1145/3609308.3625267},
isbn = {9798400703003},
pages = {52-59},
publisher = {Association for Computing Machinery},
pubstate = {published},
series = {DIMES '23},
title = {Morsels: Explicit Virtual Memory Objects},
year = {2023},
}

Close

PAVE
NVall: A Crash-Resistant and Kernel-Compatible Memory Allocator for NVRAM

Dustin Nguyen, Ole Wiedemann, Jörg Nolte, Wolfgang Schröder-PreikschatTagungsband des FG-BS Herbsttreffens 2023Gesellschaft für Informatik2023.
10.18420/fgbs2023h-02 [BibTex]

🗙

BibTex Entry

@inproceedings{Nguyen:2023,
author = {Dustin Nguyen and Ole Wiedemann and Jörg Nolte and Wolfgang Schröder-Preikschat},
booktitle = {Tagungsband des FG-BS Herbsttreffens 2023},
date = {2023},
doi = {10.18420/fgbs2023h-02},
editor = {Michael Engel},
eventdate = {2023-09-28/2023-09-29},
publisher = {Gesellschaft für Informatik},
pubstate = {published},
series = {GI Digitale Bibliothek},
title = {NVall: A Crash-Resistant and Kernel-Compatible Memory Allocator for NVRAM},
venue = {Bamberg, Germany},
}

Close

NEON PAVE Memento
On energy awareness in NVRAM-based operating systems – NEON and PAVE

Wolfgang Schröder-Preikschat, Timo HönigDagstuhl Seminar 22341: Power and Energy-Aware Computing on Heterogeneous Systems (PEACHES)Schloss Dagstuhl – Leibniz-Zentrum für Informatik2023.
10.4230/DagRep.12.8.31 [BibTex]

🗙

BibTex Entry

@incollection{SchroederPreikschat:2023,
author = {Schröder-Preikschat, Wolfgang and Hönig, Timo},
booktitle = {Dagstuhl Seminar 22341: Power and Energy-Aware Computing on Heterogeneous Systems (PEACHES)},
date = {2023},
doi = {10.4230/DagRep.12.8.31},
editor = {Eder, Kerstin I. and Hönig, Timo and Mosse, Daniel and Plauth, Max and Kirkeby, Maja Hanne},
number = {8},
pages = {43–44},
publisher = {Schloss Dagstuhl – Leibniz-Zentrum für Informatik},
series = {Dagstuhl Reports},
title = {On energy awareness in {NVRAM}-based operating systems – {NEON} and {PAVE}},
volume = {12},
}

Close

NEON PAVE
On the Performance of NVRAM-based Operating Systems: A Case Study with Linux and FreeBSD

Jonas Rabenstein, Dustin Nguyen, Oliver Giersch, Christian Eichler, Timo Hönig, Jörg Nolte, Wolfgang Schröder-Preikschat2023.
10.25593/issn.2191-5008/CS-2023-01 [BibTex]

🗙

BibTex Entry

@report{Rabenstein:2023,
author = {Jonas Rabenstein and Dustin Nguyen and Oliver Giersch and Christian Eichler and Timo Hönig and Jörg Nolte and Wolfgang Schröder-Preikschat},
date = {2023},
doi = {10.25593/issn.2191-5008/CS-2023-01},
institution = {Department Informatik},
keywords = {NEON, PAVE},
number = {CS-2023-01},
pubstate = {published},
series = {Technical reports / Department Informatik},
title = {On the Performance of NVRAM-based Operating Systems: A Case Study with Linux and FreeBSD},
}

Close

PIMPMe C
Processing-in-Memory for Databases: Query Processing and Data Transfer

Alexander Baumstark, Muhammad Attahir Jibril, Kai-Uwe SattlerProceedings of the 19th International Workshop on Data Management on New HardwareAssociation for Computing Machinery2023.
10.1145/3592980.3595323 [BibTex]

🗙

BibTex Entry

@inproceedings{Baumstark:2023a,
author = {Alexander Baumstark and Muhammad Attahir Jibril and Kai-Uwe Sattler},
booktitle = {Proceedings of the 19th International Workshop on Data Management on New Hardware},
date = {2023-06-18},
doi = {10.1145/3592980.3595323},
isbn = {9798400701917},
location = {New York, NY, USA},
pages = {107–111},
publisher = {Association for Computing Machinery},
pubstate = {published},
series = {DaMoN '23},
title = {Processing-in-Memory for Databases: Query Processing and Data Transfer},
year = {2023},
}

Close

Poster Memento
Quick-and-Dirty Memory Access Tracing with Instruction-Based Sampling

Lukas Wenzel, Sven Köhler, Henriette Hofmeier, Felix Eberhardt17th Symposium on Operating Systems Design and Implementation (OSDI'23), Poster Session2023.
PDF Poster 10.13154/294-10270 [BibTex]

🗙

BibTex Entry

@inproceedings{Wenzel:2023,
author = {Wenzel, Lukas and Köhler, Sven and Hofmeier, Henriette and Eberhardt, Felix},
booktitle = {17th Symposium on Operating Systems Design and Implementation (OSDI'23), Poster Session},
date = {2023},
doi = {10.13154/294-10270},
entrysubtype = {Poster},
pages = {1–2},
title = {Quick-and-Dirty Memory Access Tracing with Instruction-Based Sampling},
}

Close

ARTS-NVM MD
Rapid NVM Simulation and Analysis on Single Bit Granularity Featuring Gem5 and NVMain

Nils Hölscher, Minh Duy Truong, Christian Hakert, Tristan Seidl, Kuan-Hsun Chen, Jian-Jia Chen2023 IEEE 12th Non-Volatile Memory Systems and Applications Symposium (NVMSA)2023ISSN: 2575-257X.
10.1109/NVMSA58981.2023.00012 [BibTex]

🗙

BibTex Entry

@inproceedings{Hoelscher:2023,
abstract = {In emerging computing systems, non-volatile memory ({NVM}) is becoming an alternative to conventional main memory technologies such as {DRAM}. With its many advantages it also yields disadvantages, such as shorter memory cell life times. Due to its shorter lived nature, wear-leveling on main memory becomes an important aspect of systems using {NVM}. Hardware methods are implemented such as iterative write schemes (repeatedly sense and write), which will check a memory cell before changing it. But hardware methods alone do not provide optimal wear-leveling, so they should be used together with software based methods, which try to evenly distribute wear over large memory regions. However, for software wear leveling on {NVM} main memory no standardized evaluation setup exists. Which leaves most of these approaches incomparable to each other. In this work we will leverage existing solutions for evaluation such as Gem5 [1] and {NVMain} [20] and extend them with our own methods, analysis setup and benchmark suite. We thoroughly explain our setup in this article and provide a tool for a comparable and easy to use evaluation setup for software based {NVM} main memory wear-leveling.},
author = {Hölscher, Nils and Truong, Minh Duy and Hakert, Christian and Seidl, Tristan and Chen, Kuan-Hsun and Chen, Jian-Jia},
booktitle = {2023 {IEEE} 12th Non-Volatile Memory Systems and Applications Symposium ({NVMSA})},
date = {2023-08},
doi = {10.1109/NVMSA58981.2023.00012},
eventtitle = {2023 {IEEE} 12th Non-Volatile Memory Systems and Applications Symposium ({NVMSA})},
issn = {2575-257X},
keywords = {Measurement, Nonvolatile memory, Random access memory, Benchmark testing, Software, Hardware, Iterative methods, Simulation, Non-Volatile Memory, Wear-Out, Benchmark, Tool, Wear-Leveling},
note = {{ISSN}: 2575-257X},
pages = {50–55},
title = {Rapid {NVM} Simulation and Analysis on Single Bit Granularity Featuring Gem5 and {NVMain}},
url = {https://ieeexplore.ieee.org/document/10254342},
}

Close

Memento NEON
ResourceGauge: Enabling Resource-Aware Software Components

Andreas Schmidt, Luis Gerhorst, Kai Vogelgesang, Timo HönigProceedings of the 17th Annual Workshop on Operating Systems Platforms for Embedded Real-Time Applications (OSPERT'23)2023.
[BibTex]

🗙

BibTex Entry

@inproceedings{Schmidt:2023a,
author = {Andreas Schmidt and Luis Gerhorst and Kai Vogelgesang and Timo Hönig},
booktitle = {Proceedings of the 17th Annual Workshop on Operating Systems Platforms for Embedded Real-Time Applications (OSPERT'23)},
date = {2023},
location = {Vienna, Austria},
pages = {11–17},
pubstate = {published},
title = {ResourceGauge: Enabling Resource-Aware Software Components},
url = {https://www.ecrts.org/wp-content/uploads/2023/07/ospert23-proceedings.pdf#page=12},
}

Close

FOSSIL A
Software-Defined CPU Modes

Michael Roitzsch, Till Miemietz, Christian Von Elm, Nils AsmussenProceedings of the 19th Workshop on Hot Topics in Operating SystemsAssociation for Computing Machinery2023.
10.1145/3593856.3595894 [BibTex]

🗙

BibTex Entry

@inproceedings{Roitzsch:2023,
author = {Michael Roitzsch and Till Miemietz and Christian Von Elm and Nils Asmussen},
booktitle = {Proceedings of the 19th Workshop on Hot Topics in Operating Systems},
date = {2023-06-22},
doi = {10.1145/3593856.3595894},
isbn = {9798400701955},
keywords = {microcode, mode transitions, processor modes},
location = {Providence, RI, USA},
pages = {23–29},
publisher = {Association for Computing Machinery},
pubstate = {published},
series = {HOTOS '23},
title = {Software-Defined CPU Modes},
year = {2023},
}

Close

Special Session ARTS-NVM HYPNOS CIMware HetCIM B
Special Session – Non-Volatile Memories: Challenges and Opportunities for Embedded System Architectures with Focus on Machine Learning Applications

Jörg Henkel, Lokesh Siddhu, Lars Bauer, Jürgen Teich, Stefan Wildermann, Mehdi Tahoori, Mahta Mayahinia, Jeronimo Castrillon, Asif Ali Khan, Hamid Farzaneh, João Paulo C. de Lima, Jian-Jia Chen, Christian Hakert, Kuan-Hsun Chen, Chia-Lin Yang, Hsiang-Yun ChengProceedings of the 2023 International Conference on Compilers, Architecture, and Synthesis of Embedded Systems (CASES)2023.
10.1145/3607889.3609088 [BibTex]

🗙

BibTex Entry

@inproceedings{Henkel:2023,
author = {Henkel, Jörg and Siddhu, Lokesh and Bauer, Lars and Teich, Jürgen and Wildermann, Stefan and Tahoori, Mehdi and Mayahinia, Mahta and Castrillon, Jeronimo and Khan, Asif Ali and Farzaneh, Hamid and de Lima, João Paulo C. and Chen, Jian-Jia and Hakert, Christian and Chen, Kuan-Hsun and Yang, Chia-Lin and Cheng, Hsiang-Yun},
booktitle = {Proceedings of the 2023 International Conference on Compilers, Architecture, and Synthesis of Embedded Systems (CASES)},
comment-marcel = {SPP grant CIMware missing},
date = {2023-09},
doi = {10.1145/3607889.3609088},
entrysubtype = {Special Session},
location = {Hamburg, Germany},
pages = {11-20},
pubstate = {published},
title = {Special Session – Non-Volatile Memories: Challenges and Opportunities for Embedded System Architectures with Focus on Machine Learning Applications},
}

Close

ARTS-NVM
Swift-CNN: Leveraging PCM Memory's Fast Write Mode to Accelerate CNNs

Lokesh Siddhu, Hassan Nassar, Lars Bauer, Christian Hakert, Nils Hölscher, Jian-Jia Chen, Jörg HenkelIEEE Embedded Systems Letters (ESL)15.42023.
10.1109/LES.2023.3298742 [BibTex]

🗙

BibTex Entry

@article{Siddhu:2023,
author = {Siddhu, Lokesh and Nassar, Hassan and Bauer, Lars and Hakert, Christian and Hölscher, Nils and Chen, Jian-Jia and Henkel, Jörg},
date = {2023-09-25},
doi = {10.1109/LES.2023.3298742},
journaltitle = {IEEE Embedded Systems Letters (ESL)},
number = {4},
pages = {234-237},
pubstate = {published},
title = {Swift-CNN: Leveraging PCM Memory's Fast Write Mode to Accelerate CNNs},
volume = {15},
year = {2023},
}

Close

PIMPMe C
Temporal Graph Processing in Modern Memory Hierarchies

Alexander Baumstark, Muhammad Attahir Jibril, Kai-Uwe SattlerAdvances in Databases and Information SystemsSpringer Nature Switzerland2023.
10.1007/978-3-031-42914-9_8 [BibTex]

🗙

BibTex Entry

@inproceedings{Baumstark:2023d,
abstract = {Updates in graph {DBMS} lead to structural changes in the graph over time with different intermediate states. These intermediate states in a {DBMS} and the time when the actions to the actual data take place can be processed using temporal {DBMSs}. Most {DBMSs} built their temporal features based on their non-temporal processing and storage without considering the memory hierarchy of the underlying system. This leads to slower temporal processing and poor storage utilization. In this paper, we propose a storage and processing strategy for (bi-) temporal graphs using temporal materialized views ({TMV}) while exploiting the memory hierarchy of a modern system. Further, we show a solution to the query containment problem for certain types of temporal graph queries. Finally, we evaluate the overhead and performance of the presented approach. The results show that using {TMV} reduces the runtime of temporal graph queries while using less memory.},
author = {Baumstark, Alexander and Jibril, Muhammad Attahir and Sattler, Kai-Uwe},
booktitle = {Advances in Databases and Information Systems},
date = {2023-08-28},
doi = {10.1007/978-3-031-42914-9_8},
editor = {Abelló, Alberto and Vassiliadis, Panos and Romero, Oscar and Wrembel, Robert},
isbn = {9783031429149},
keywords = {Bitemporal Graph Processing, Materialized View, Memory Hierarchy},
langid = {english},
location = {Cham},
pages = {103–116},
publisher = {Springer Nature Switzerland},
title = {Temporal Graph Processing in Modern Memory Hierarchies},
}

Close

MD ARTS-NVM C
Towards Data-Based Cache Optimization of B+-Trees

Roland Kühn, Daniel Biebert, Christian Hakert, Jian-Jia Chen, Jens TeubnerProceedings of the 19th International Workshop on Data Management on New Hardware, DaMoN 2023, Seattle, WA, USA, June 18-23, 2023ACM2023.
10.1145/3592980.3595316 [BibTex]

🗙

BibTex Entry

@inproceedings{Kuehn:2023,
author = {Roland Kühn and Daniel Biebert and Christian Hakert and Jian-Jia Chen and Jens Teubner},
booktitle = {Proceedings of the 19th International Workshop on Data Management on New Hardware, DaMoN 2023, Seattle, WA, USA, June 18-23, 2023},
date = {2023},
doi = {10.1145/3592980.3595316},
editor = {Norman May and Nesime Tatbul},
pages = {63–69},
publisher = {ACM},
pubstate = {published},
title = {Towards Data-Based Cache Optimization of B+-Trees},
}

Close

NEON PAVE C
Towards Just-In-Time Compiling of Operating Systems

Maximilian Ott, Phillip Raffeck, Volkmar Sieh, Wolfgang Schröder-PreikschatProceedings of the 12th Workshop on Programming Languages and Operating SystemsAssociation for Computing Machinery2023.
10.1145/3623759.3624551 [BibTex]

🗙

BibTex Entry

@inproceedings{Ott:2023,
author = {Maximilian Ott and Phillip Raffeck and Volkmar Sieh and Wolfgang Schröder-Preikschat},
booktitle = {Proceedings of the 12th Workshop on Programming Languages and Operating Systems},
date = {2023-10-23},
doi = {10.1145/3623759.3624551},
isbn = {9798400704048},
keywords = {NEON},
location = {New York, NY, USA},
pages = {41-48},
publisher = {Association for Computing Machinery},
pubstate = {published},
series = {PLOS '23},
title = {Towards Just-In-Time Compiling of Operating Systems},
year = {2023},
}

Close

ParPerOS A*
Virtual-Memory Assisted Buffer Management

Viktor Leis, Adnan Alhomssi, Tobias Ziegler, Yannick Loeck, Christian DietrichProceedings of the ACM SIGMOD/PODS International Conference on Management of Data (SIGMOD'23)ACM2023.
10.1145/3588687 [BibTex]

🗙

BibTex Entry

@inproceedings{Leis:2023,
author = {Viktor Leis and Adnan Alhomssi and Tobias Ziegler and Yannick Loeck and Christian Dietrich},
booktitle = {Proceedings of the ACM SIGMOD/PODS International Conference on Management of Data (SIGMOD'23)},
date = {2023-06},
doi = {10.1145/3588687},
location = {Seattle, WA, USA},
publisher = {ACM},
pubstate = {published},
title = {Virtual-Memory Assisted Buffer Management},
}

Close

Memento NEON
carbond: An Operating-System Daemon for Carbon Awareness

Andreas Schmidt, Gregory Stock, Robin Ohs, Luis Gerhorst, Benedict Herzog, Timo Hönig2nd Workshop on Sustainable Computer Systems (HotCarbon '23)ACM2023.
10.1145/3604930.3605707 [BibTex]

🗙

BibTex Entry

@inproceedings{Schmidt:2023,
author = {Andreas Schmidt and Gregory Stock and Robin Ohs and Luis Gerhorst and Benedict Herzog and Timo Hönig},
booktitle = {2nd Workshop on Sustainable Computer Systems (HotCarbon '23)},
date = {2023-07},
doi = {10.1145/3604930.3605707},
isbn = {979-8-4007-0242-6},
location = {Boston, MA, USA},
publisher = {ACM},
pubstate = {published},
title = {carbond: An Operating-System Daemon for Carbon Awareness},
}

Close

2021

NEON C
AnyCall: Fast and Flexible System-Call Aggregation

Luis Gerhorst, Benedict Herzog, Stefan Reif, Wolfgang Schröder-Preikschat, Timo HönigProceedings of the 11th Workshop on Programming Languages and Operating SystemsAssociation for Computing Machinery2021.
10.1145/3477113.3487267 [BibTex]

🗙

BibTex Entry

@inproceedings{Gerhorst:2021,
author = {Luis Gerhorst and Benedict Herzog and Stefan Reif and Wolfgang Schröder-Preikschat and Timo Hönig},
booktitle = {Proceedings of the 11th Workshop on Programming Languages and Operating Systems},
date = {2021},
doi = {10.1145/3477113.3487267},
isbn = {9781450387071},
keywords = {NEON},
location = {Virtual Event, Germany},
pages = {1–8},
publisher = {Association for Computing Machinery},
pubstate = {published},
series = {PLOS '21},
title = {AnyCall: Fast and Flexible System-Call Aggregation},
url = {https://doi.org/10.1145/3477113.3487267},
}

Close

Conference NEON
Migration-Based Synchronization

Stefan Reif, Phillip Raffeck, Luis Gerhorst, Wolfgang Schröder-Preikschat, Timo HönigProceedings of the 2021 XI Brazilian Symposium on Computing Systems Engineering (SBESC'21)IEEE2021.
10.1109/SBESC53686.2021.9628358 [BibTex]

🗙

BibTex Entry

@inproceedings{Reif:2021,
author = {Stefan Reif and Phillip Raffeck and Luis Gerhorst and Wolfgang Schr{ö}der-Preikschat and Timo H{ö}nig},
booktitle = {Proceedings of the 2021 XI Brazilian Symposium on Computing Systems Engineering (SBESC'21)},
date = {2021},
doi = {10.1109/SBESC53686.2021.9628358},
entrysubtype = {Conference},
isbn = {978-1-6654-4311-1},
pages = {1–8},
publisher = {IEEE},
title = {Migration-Based Synchronization},
}

Close

Related publications

2025

Tutorial MD ARTS-NVM HetCIM HYPNOS
Modeling and Simulating Emerging Memory Technologies: A Tutorial

Yun-Chih Chen, Tristan Seidl, Nils Hölscher, Christian Hakert, Minh Duy Truong, Jian-Jia Chen, João Paulo C. de Lima, Asif Ali Khan, Jeronimo Castrillon, Ali Nezhadi, Lokesh Siddhu, Hassan Nassar, Mahta Mayahinia, Mehdi Baradaran Tahoori, Jörg Henkel, Nils Wilbert, Stefan Wildermann, Jürgen TeicharXiv2025.
PDF 10.48550/arXiv.2502.10167 [BibTex]

🗙

BibTex Entry

@misc{Chen:2025,
abstract = {Non-volatile Memory ({NVM}) technologies present a promising alternative to traditional volatile memories such as {SRAM} and {DRAM}. Due to the limited availability of real {NVM} devices, simulators play a crucial role in architectural exploration and hardware-software co-design. This tutorial presents a simulation toolchain through four detailed case studies, showcasing its applicability to various domains of system design, including hybrid main-memory and cache, compute-in-memory, and wear-leveling design. These case studies provide the reader with practical insights on customizing the toolchain for their specific research needs. The source code is open-sourced.},
author = {Chen, Yun-Chih and Seidl, Tristan and Hölscher, Nils and Hakert, Christian and Truong, Minh Duy and Chen, Jian-Jia and de Lima, João Paulo C. and Khan, Asif Ali and Castrillon, Jeronimo and Nezhadi, Ali and Siddhu, Lokesh and Nassar, Hassan and Mayahinia, Mahta and Tahoori, Mehdi Baradaran and Henkel, Jörg and Wilbert, Nils and Wildermann, Stefan and Teich, Jürgen},
date = {2025-02-14},
doi = {10.48550/arXiv.2502.10167},
entrysubtype = {Tutorial},
eprint = {2502.10167},
eprintclass = {cs},
eprinttype = {arxiv},
keywords = {Computer Science - Hardware Architecture},
number = {{arXiv}:2502.10167},
publisher = {{arXiv}},
title = {Modeling and Simulating Emerging Memory Technologies: A Tutorial},
url = {http://arxiv.org/abs/2502.10167},
}

Close

2024

CIMware B
Algorithm to Technology Co-Optimization for CiM-based Hyperdimensional Computing

Mahta Mayahinia, Simon Thomann, Paul R. Genssler, Christopher Münch, Hussam Amrouch, Mehdi B. TahooriProceedings of the 2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)IEEE2024.
10.23919/DATE58400.2024.10546842 [BibTex]

🗙

BibTex Entry

@inproceedings{Mayahinia:2024,
author = {Mahta Mayahinia and Simon Thomann and Paul R. Genssler and Christopher M{ü}nch and Hussam Amrouch and Mehdi B. Tahoori},
booktitle = {Proceedings of the 2024 Design, Automation \& Test in Europe Conference \& Exhibition (DATE)},
date = {2024-03},
doi = {10.23919/DATE58400.2024.10546842},
pages = {1–6},
publisher = {{IEEE}},
title = {Algorithm to Technology Co-Optimization for {CiM}-based Hyperdimensional Computing},
url = {https://ieeexplore.ieee.org/document/10546842},
}

Close

CIMware
Cross-Layer Reliability Evaluation of In-Memory Similarity Computation

A. Nezhadi, M. Mayahinia, M. B. TahooriProceedings of the 2024 IEEE International Test Conference (ITC)IEEE2024.
10.1109/ITC51657.2024.00024 [BibTex]

🗙

BibTex Entry

@inproceedings{Nezhadi:2024,
author = {Nezhadi, A. and Mayahinia, M. and Tahoori, M. B.},
booktitle = {Proceedings of the 2024 {IEEE} {International} {Test} {Conference} ({ITC})},
date = {2024-11-29},
doi = {10.1109/ITC51657.2024.00024},
eventdate = {2024-11-03},
isbn = {9798331520137},
pages = {81–85},
publisher = {IEEE},
title = {Cross-Layer Reliability Evaluation of In-Memory Similarity Computation},
venue = {San Diego, CA, USA},
}

Close

CIMware B
DropHD: Technology/Algorithm Co-Design for Reliable Energy-Efficient NVM-Based Hyper-Dimensional Computing Under Voltage Scaling

Paul R. Genssler, Mahta Mayahinia, Simon Thomann, Mehdi B. Tahoori, Hussam AmrouchProceedings of the 2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)IEEE2024.
10.23919/DATE58400.2024.10546626 [BibTex]

🗙

BibTex Entry

@inproceedings{Genssler:2024,
author = {Genssler, Paul R. and Mayahinia, Mahta and Thomann, Simon and Tahoori, Mehdi B. and Amrouch, Hussam},
booktitle = {Proceedings of the 2024 Design, Automation \& Test in Europe Conference \& Exhibition (DATE)},
date = {2024-03},
doi = {10.23919/DATE58400.2024.10546626},
pages = {1–6},
publisher = {{IEEE}},
title = {DropHD: Technology/Algorithm Co-Design for Reliable Energy-Efficient NVM-Based Hyper-Dimensional Computing Under Voltage Scaling},
}

Close

CIMware
Reliability analysis and mitigation for analog computation-in-memory: from technology to application

Mahta Mayahinia, Haneen G. Hezayyin, Mehdi B. TahooriProceedings of the 42nd IEEE VLSI Test Symposium (VTS)IEEE2024.
10.1109/VTS60656.2024.10538514 [BibTex]

🗙

BibTex Entry

@inproceedings{Mayahinia:2024a,
author = {Mahta Mayahinia and Haneen G. Hezayyin and Mehdi B. Tahoori},
booktitle = {Proceedings of the 42nd {IEEE} {VLSI} Test Symposium ({VTS})},
date = {2024},
doi = {10.1109/VTS60656.2024.10538514},
pages = {1–7},
publisher = {{IEEE}},
title = {Reliability analysis and mitigation for analog computation-in-memory: from technology to application},
}

Close

2023

Workshop SMASH
Assessing Non-Volatile Memory in Modern Heterogeneous Storage Landscape using a Write-optimized Storage Stack

Sajad Karim, Johannes Wünsche, David Broneske, Michael Kuhn, Gunter SaakeProceedings of the 34th GI-Workshop on Foundations of Databases (Grundlagen von Datenbanken)2023.
[BibTex]

🗙

BibTex Entry

@inproceedings{Karim:2023,
author = {Sajad Karim and Johannes Wünsche and David Broneske and Michael Kuhn and Gunter Saake},
booktitle = {Proceedings of the 34th GI-Workshop on Foundations of Databases (Grundlagen von Datenbanken)},
comment-marcel = {SPP grant missing},
date = {2023-05},
entrysubtype = {Workshop},
title = {Assessing Non-Volatile Memory in Modern Heterogeneous Storage Landscape using a Write-optimized Storage Stack},
url = {https://ceur-ws.org/Vol-3714/paper4.pdf},
}

Close

Memento NEON
Dynamische Rekonfiguration der Mitigierungen von Hardware-Schwachstellen im Linux-Kernel

Henriette HofmeierMitgliedermagazin Frauen machen Informatik47Fachgruppe Frauen und Informatik der Gesellschaft für Informatik2023.
[BibTex]

🗙

BibTex Entry

@article{Hofmeier:2023a,
author = {Hofmeier, Henriette},
date = {2023},
journaltitle = {Mitgliedermagazin Frauen machen Informatik},
pages = {32–36},
publisher = {Fachgruppe Frauen und Informatik der Gesellschaft für Informatik},
title = {Dynamische Rekonfiguration der Mitigierungen von Hardware-Schwachstellen im Linux-Kernel},
url = {https://dl.gi.de/handle/20.500.12116/42505},
volume = {47},
}

Close

ParPerOS Best Paper Award
TOSTING: Investigating Total Store Ordering on ARM

Lars Wrenger, Dominik Töllner, Daniel LohmannProceedings of the 36th GI/ITG International Conference on Architecture of Computing Systems (ARCS 23)Springer International Publishing2023Best Paper Award.
10.1007/978-3-031-42785-5_10 [BibTex]

🗙

BibTex Entry

@inproceedings{Wrenger:2023a,
author = {Lars Wrenger and Dominik Töllner and Daniel Lohmann},
booktitle = {Proceedings of the 36th GI/ITG International Conference on Architecture of Computing Systems (ARCS 23)},
comment-marcel = {SPP grant missing},
date = {2023-07},
doi = {10.1007/978-3-031-42785-5_10},
location = {Athens, Greece},
publisher = {Springer International Publishing},
pubstate = {published},
title = {TOSTING: Investigating Total Store Ordering on ARM},
}

Close

CIMware
Timing-accurate simulation framework for NVM-based compute-in-memory architecture exploration

Vincent Rietz, Christopher Münch, Mahta Mayahinia, Mehdi Tahooriit-Information Technology65.1-2De Gruyter Oldenbourg2023.
10.1515/itit-2023-0019 [BibTex]

🗙

BibTex Entry

@article{Rietz:2023,
author = {Vincent Rietz and Christopher Münch and Mahta Mayahinia and Mehdi Tahoori},
comment-marcel = {Website: No funding declared},
date = {2023-05-03},
doi = {10.1515/itit-2023-0019},
journaltitle = {it-Information Technology},
number = {1-2},
pages = {13–29},
publisher = {De Gruyter Oldenbourg},
pubstate = {published},
title = {Timing-accurate simulation framework for NVM-based compute-in-memory architecture exploration},
volume = {65},
year = {2023},
}

Close

Memento NEON
Wie viel Energie darf Schutz kosten?

Henriette Hofmeier.inf - Das Informatik-Magazin04Mitgliedermagazin der Gesellschaft für Informatik2023.
[BibTex]

🗙

BibTex Entry

@article{Hofmeier:2023,
author = {Hofmeier, Henriette},
date = {2023},
journaltitle = {.inf - Das Informatik-Magazin},
pages = {28–31},
publisher = {Mitgliedermagazin der Gesellschaft für Informatik},
title = {Wie viel Energie darf Schutz kosten?},
url = {https://inf.gi.de/fileadmin/GI/Projekte/Magazin/Ausgabe_4/inf_Ausgabe_04.pdf},
volume = {04},
}

Close

2022

Memento NEON
Bears: Building Energy-Aware Reconfigurable Systems

Benedict Herzog, Stefan Reif, Fabian Hügel, Wolfgang Schröder-Preikschat, Timo HönigProceedings of the 12th Brazilian Symposium on Computing Systems Engineering (SBESC'22)IEEE2022.
10.1109/SBESC56799.2022.9964629 [BibTex]

🗙

BibTex Entry

@inproceedings{Herzog:2022,
author = {Herzog, Benedict and Reif, Stefan and Hügel, Fabian and Schröder-Preikschat, Wolfgang and Hönig, Timo},
booktitle = {Proceedings of the 12th Brazilian Symposium on Computing Systems Engineering (SBESC'22)},
comment-marcel = {SPP grant missing Timo H.: Final version contained funding attribution, but organizers didn't push that version to ACM DL. Pre-SPP},
date = {2022},
doi = {10.1109/SBESC56799.2022.9964629},
location = {Fortaleza, Ceara, Brazil},
pages = {1–8},
publisher = {IEEE},
pubstate = {published},
title = {Bears: Building Energy-Aware Reconfigurable Systems},
}

Close

Conference Anchor A
SafePM: A Sanitizer for Persistent Memory

Kartal Kaan Bozdoğan, Dimitrios Stavrakakis, Shady Issa, Pramod BhatotiaProceedings of the Seventeenth European Conference on Computer SystemsAssociation for Computing Machinery2022.
10.1145/3492321.3519574 [BibTex]

🗙

BibTex Entry

@inproceedings{Bozdogan:2022,
author = {Bozdo{ğ}an, Kartal Kaan and Stavrakakis, Dimitrios and Issa, Shady and Bhatotia, Pramod},
booktitle = {Proceedings of the Seventeenth European Conference on Computer Systems},
comment-marcel = {SPP grant missing},
date = {2022-03-28},
doi = {10.1145/3492321.3519574},
entrysubtype = {Conference},
isbn = {9781450391627},
keywords = {dependable systems, memory safety},
location = {Rennes, France},
pages = {506–524},
publisher = {Association for Computing Machinery},
pubstate = {published},
series = {EuroSys '22},
title = {SafePM: A Sanitizer for Persistent Memory},
year = {2022},
}

Close

Conference Memento Best Paper Award
Trusted Monitor: TEE-Based System Monitoring

Benedikt Jung, Christian Eichler, Jonas Röckl, Ralph Schlenk, Timo Hönig, Tilo MüllerProceedings of the 12th Brazilian Symposium on Computing Systems Engineering (SBESC'22)IEEE2022Best Paper Award.
10.1109/SBESC56799.2022.9964869 [BibTex]

🗙

BibTex Entry

@inproceedings{Jung:2022,
author = {Benedikt Jung and Christian Eichler and Jonas Röckl and Ralph Schlenk and Timo Hönig and Tilo Müller},
booktitle = {Proceedings of the 12th Brazilian Symposium on Computing Systems Engineering (SBESC'22)},
comment-marcel = {SPP grant missing Pre-SPP},
date = {2022},
doi = {10.1109/SBESC56799.2022.9964869},
entrysubtype = {Conference},
location = {Fortaleza, Ceara, Brazil},
pages = {1–8},
publisher = {IEEE},
pubstate = {published},
title = {Trusted Monitor: TEE-Based System Monitoring},
}

Close